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An electrostatic discharge protection circuit and protection method

A release circuit, electrostatic discharge technology, applied to emergency protection circuit devices, static electricity, emergency protection circuit devices for limiting overcurrent/overvoltage, etc., can solve the problem that it is difficult to achieve the required ESD capability and cannot fully discharge the ESD current , ESD discharge time is small, etc., to improve the overall ESD capability, improve ESD discharge time, and improve efficiency

Active Publication Date: 2022-04-01
青岛信芯微电子科技股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The invention provides an electrostatic discharge protection circuit and protection method, which solves the problem that the ESD discharge time of the existing electrostatic discharge protection circuit is small, the ESD current cannot be fully discharged, and the discharge efficiency is low, and it is difficult to achieve the required ESD capability The problem

Method used

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  • An electrostatic discharge protection circuit and protection method
  • An electrostatic discharge protection circuit and protection method
  • An electrostatic discharge protection circuit and protection method

Examples

Experimental program
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Effect test

Embodiment 1

[0062] An embodiment of the present invention provides a schematic diagram of an electrostatic discharge protection circuit, such as Figure 4 shown, including:

[0063] The main structure 401 is respectively connected to the power interface 403 and the ground wire 404, including a first resistor-capacitor circuit 401-1 and a first positive current release circuit 401-2;

[0064] At least one slave structure 402, each slave structure is respectively connected to the power interface, the ground wire and the IO interface 405 corresponding to the slave structure, and the IO interface is connected to the A power interface, including a second resistor-capacitor circuit 402-2, a second positive current release circuit 402-3, a first negative current release circuit 402-4, and a second negative current release circuit 402-5;

[0065] the above Figure 4 Inside the dotted line box on the left side, that is, 401 is the main circuit structure, and inside the dotted line box on the rig...

Embodiment 2

[0145] An embodiment of the present invention provides a flowchart of an electrostatic discharge protection method, such as Figure 8 shown, including:

[0146] Step S801, when the power interface and / or the IO interface generates a positive electrostatic current, release the positive electrostatic current to the ground through the first positive current releasing circuit in the master structure and the second positive current releasing circuit in each slave structure Wire;

Embodiment approach 1

[0148] Implementation mode 1: When a +ESD event occurs on the IO interface, the specific current release process is:

[0149] When a +ESD event occurs on the IO interface, the +ESD current is released. The above +ESD current is conducted to the power interface VDD through P1, and then passes through the shared resistance R in the distributed structure and each capacitive element. Figure 5 The NMOS1 and NMOS2 in the circuit form an RC circuit to control the RC time. During an RC time, the potential on the capacitor NMOS2 is low, and after passing through the inverter F2, the Gate terminal of Q2 is at a high potential. At this time, Q2 is turned on, and the above-mentioned +ESD current is discharged to the ground through the above-mentioned Q2.

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Abstract

The present invention provides an electrostatic discharge protection circuit and a protection method, the circuit comprising: a main structure connected to a power interface and a ground wire respectively, including a first resistor-capacitor circuit and a first positive current release circuit; at least one slave structure, Each slave structure is connected to a power interface, a ground wire, and an IO interface corresponding to the slave structure, and the IO interface is connected to the power interface, including a second resistor-capacitor circuit, a second positive current release circuit, a first negative current release circuit and a second Two negative current release circuits; the capacitive elements of the first resistor-capacitor circuit and the second resistor-capacitor circuit are connected in parallel, and share the resistor elements of the first resistor-capacitor circuit. The present invention disperses the capacitance in the main circuit and the slave circuit through the master-slave distributed structure, makes full use of the chip area, realizes larger capacitance, and improves the ESD discharge time; adds a positive current release circuit in each slave circuit to improve the discharge time The efficiency of the discharge current improves the overall ESD capability.

Description

technical field [0001] The invention relates to the technical field of electronic circuits, in particular to an electrostatic discharge protection circuit and a protection method. Background technique [0002] Electro-Static discharge (ESD) refers to the uncontrolled transfer of electrostatic charge from one object to another. Although the total amount of static electricity transferred when electrostatic discharge occurs is usually small, the energy of the discharge is accumulated in a small area on the silicon chip. Generally, the ESD peak current is between a few amperes and more than a dozen amperes, and the damage to the internal circuit And testing the quality of the ESD protection circuit is mainly determined by the peak current. Moreover, the occurrence time of an ESD event is generally at the nanosecond level. Therefore, how to quickly discharge the current at the peak current and clamp the high voltage is particularly important. [0003] In the existing electrosta...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05F3/02H02H9/04
CPCH05F3/02H02H9/04
Inventor 杜尉丰傅懿斌马波
Owner 青岛信芯微电子科技股份有限公司
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