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Semiconductor manufacturing method

A manufacturing method and semiconductor technology, applied in semiconductor lasers, laser parts, electrical components, etc., can solve the problems of monitoring and characterizing materials, and achieve the effect of low loss and good reliability

Active Publication Date: 2021-06-18
GUILIN LASERCOM TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with SAG technology, the BFS must be formed on the unmodified epi region, while the laser must be formed on the modified epi region
Therefore, it is difficult to monitor and characterize materials used in laser components by SAG techniques

Method used

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  • Semiconductor manufacturing method
  • Semiconductor manufacturing method
  • Semiconductor manufacturing method

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Embodiment Construction

[0037]This embodiment provides a semiconductor manufacturing method for growing quantum wells with different layer thicknesses in the same plane during a single semiconductor epitaxial deposition process. First, a viaduct structure is formed on the region that needs to be modified, such as image 3 shown. The epitaxial layer under the bridge structure is thinner than the epitaxial layer outside the bridge structure due to reduced gas source diffusion under the bridge structure. Therefore, this technique results in a negative layer epitaxy rate in the modified region compared to the unmodified region, as Figure 4 As shown in (a)-(c), the inventors call this technology Selective Depletion Epitaxy SDE.

[0038] This embodiment relates to a wafer manufacturing method for growing quantum wells with different layer thicknesses in the same plane during a single semiconductor epitaxial deposition process, comprising the following steps:

[0039] Step 1, see figure 2 , implement t...

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Abstract

The invention provides a semiconductor manufacturing method. The method is used for growing quantum wells with different layer thicknesses in the same plane in the epitaxial deposition process of a single semiconductor, and comprises the following steps: carrying out first layer epitaxy to grow a basic epitaxial layer structure which comprises a substrate, a sacrificial layer and a bridging layer, wherein the sacrificial layer is located between the substrate and the bridging layer; forming a bridge pattern through photoetching and etching, and forming a wafer with a patterned bridge head suspension; cleaning the wafer; sending the cleaned wafer with the patterned bridgehead suspension back to the epitaxial equipment, and performing second layer epitaxy; and selectively removing part of a viaduct structure so as to form a wafer with epitaxial layers with different thicknesses in different areas. The invention further provides a corresponding laser integrated structure manufacturing method and a laser integrated structure manufactured therethrough. When the optical mode exits an integrated device through a beamforming portion, the resulting far-field pattern is narrower, facilitating optical coupling of the device into the optical fiber and reliability of the device.

Description

technical field [0001] The invention relates to the field of semiconductor components and chips, in particular to a semiconductor manufacturing method for growing quantum wells with different layer thicknesses in the same plane during a single semiconductor epitaxial deposition process. Background technique [0002] In opto-semiconductor integrated structures, optical modes must be able to propagate along the horizontal planar waveguide from one part to another part with different properties with minimal losses. Generally, epitaxy can complete parts with different properties on the plane with multiple growths, but the cost is high, and the height of waveguides with different properties needs to be strictly controlled. Techniques capable of growing cross-sections with multiple portions of different properties in a single epitaxial growth would be beneficial in reducing cost and complexity and need to be developed and investigated. [0003] Existing techniques such as so-call...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01S5/34H01S5/026
CPCH01S5/026H01S5/34
Inventor 陈伯庄
Owner GUILIN LASERCOM TECH CO LTD