Method for improving warping degree of silicon carbide wafer
A silicon carbide crystal, round warpage technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of yield loss, increased device cost, low efficiency, etc., to meet strict requirements, reduce Reduced process time and improved warpage
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[0049] After ion implantation of a SiC wafer of a product, the maximum warpage reaches 67um, and the maximum warpage is reduced to 45um by using the backside dry etching method 1, and the maximum warpage is reduced to 30um by using the backside dry etching method 2 , which is 50% lower than the original maximum warpage, which meets the requirements of the photolithography process. (See Table 1 below for specific recipe parameters, see Image 6 ).
[0050] Table 1 Dry etching menu
[0051] menu Source RF power (W) Bias RF power (W) Pressure (mTorr) Gas (sccm) time(s) 1 1500 100 10 60SF6 / 50O 2
[0052] Any reference to any numerical value in this invention includes all values in increments of one unit from the lowest value to the highest value if there is a separation of only two units between any lowest value and any highest value. For example, if it is stated that the amount of a component, or the value of a process variable such as temperatu...
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