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Superconducting high-frequency underclocking module and method and superconducting high-frequency testing system and method

A test system and high-frequency technology, which is applied in the direction of measuring electricity, measuring devices, and measuring electrical variables, can solve the problems of superconducting high-frequency frequency reduction, large circuit scale of the test system, and inconsistent working conditions, so as to simplify the test system, The effect of simple circuit structure

Pending Publication Date: 2021-07-09
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a superconducting high-frequency frequency reduction module and method, a superconducting high-frequency testing system and method, which are used to solve the problem of superconducting high-frequency frequency reduction in the prior art. The circuit scale of the test system is large, and the actual working conditions are inconsistent

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  • Superconducting high-frequency underclocking module and method and superconducting high-frequency testing system and method
  • Superconducting high-frequency underclocking module and method and superconducting high-frequency testing system and method
  • Superconducting high-frequency underclocking module and method and superconducting high-frequency testing system and method

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Embodiment 1

[0078] Such as figure 1 As shown, this embodiment provides a superconducting high-frequency down-conversion unit 11, such as figure 1 As shown, the superconducting high-frequency frequency reduction unit 11 includes: a non-destructive readout unit 111 and a trigger unit 112;

[0079] The flip-flop unit 112 includes two or more T flip-flops (T flip flops, TFFs) connected in series in sequence, wherein the first T flip-flop and the last T flip-flop have two output ports, and the remaining T flip-flops have two There is one output port; the input port of the first T flip-flop receives the clock signal, the first output port is connected to the reset port of the non-destructive readout unit 111, and the second output port is connected to the input port of the next T flip-flop; The first output port of the last T flip-flop is connected to the setting port of the non-destructive readout unit 111, and the second output port outputs the down-frequency clock sub-signal;

[0080] The ...

Embodiment 2

[0091] This embodiment provides a superconducting high-frequency down-frequency module 1, such as Figure 5 As shown, the superconducting high-frequency frequency reduction module 1 may include at least two superconducting high-frequency frequency reduction units 11: the first superconducting high-frequency frequency reduction unit 11...the i-th superconducting high-frequency frequency reduction unit 11...the first N superconducting high-frequency frequency reduction unit 11, 1≤i≤N, the i-th superconducting high-frequency frequency reduction unit 11 is any one of the above two superconducting high-frequency frequency reduction units 11, and each superconducting high-frequency frequency reduction unit The composition of the frequency unit 11 can be the same or different; the output port of the flip-flop unit 112 in the previous superconducting high-frequency down-frequency unit 11 is connected to the input port of the flip-flop unit 112 in the next superconducting high-frequency...

Embodiment 3

[0100] This embodiment provides a superconducting high-frequency test system, such as Image 6 As shown, the superconducting high-frequency test system includes: a high-frequency clock generation module 2, a linear feedback shift register 3, and a multi-channel superconducting high-frequency frequency reduction module 1 as described in Embodiment 1; in this embodiment , the superconducting high-frequency test system is implemented based on the superconducting high-frequency frequency reduction module 1 in the first embodiment. In practical applications, the method can be carried out based on any superconducting high-frequency frequency reduction module 1 that can realize the system. It is not limited to this embodiment.

[0101] Such as Image 6 As shown, the superconducting high-frequency test system also includes 3 DC / SFQ (Direct Current / Single Flux Quantum, direct current / single flux quantum) converters 5, the trigger pulse signal, the low-frequency clock signal, the initi...

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Abstract

The invention provides a superconducting high-frequency underclocking module and method, and the method comprises the steps: receiving a high-frequency clock signal, converting the high-frequency clock signal into an underclocking clock sub-signal and a double clock signal, carrying out the resetting based on the double clock signal, carrying out the periodic selection sampling of a test signal, and converting the test signal into an underclocking test signal. The invention further provides a superconducting high-frequency test system and method based on the linear feedback shift register. The circuit structure is simpler; the continuous high-frequency test can be realized, and the actual working condition of the circuit to be tested is better met; and the data frequency reduction system reduces the frequency to the KHz level by performing frequency reduction processing on the output GHz-level high-frequency signal, so that the signal can be directly output, and the whole test system is simplified.

Description

technical field [0001] The invention relates to the field of superconducting circuits, in particular to a superconducting high-frequency frequency reduction module and method, and a superconducting high-frequency testing system and method. Background technique [0002] Superconducting SFQ (Single Flux Quantum, single flux quantum) circuits have great potential to be used in high-performance computing and other fields because their two performance indicators, speed and power consumption, are superior to semiconductor CMOS circuits. Therefore, testing the high-frequency performance of the circuit is a very important step in the design of superconducting SFQ circuits, and it is also an important step to truly reflect the advantages of superconducting circuits. In superconducting circuit design, to build a large-scale digital circuit, from the high-frequency design of each gate circuit (cell) used to the high-frequency design of each module to the high-frequency design of the en...

Claims

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Application Information

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IPC IPC(8): H03H9/72G01R31/3181
CPCH03H9/72G01R31/3181
Inventor 任洁陈理云应利良王镇
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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