Source-drain double-doped reconfigurable field effect transistor

Abstract

The invention discloses a source-drain double-doped reconfigurable field effect transistor, which comprises a fin-type channel, a source end and a drain end which are arranged at two ends of the fin-type channel and have a three-layer structure, side walls which are arranged at the left side and the right side of the fin-type channel and are symmetrically distributed, and gate oxides which are in contact with the side walls, wrap the fin-type channel on three surfaces and are symmetrically distributed at the left side and the right side of the fin-type channel, and a control grid and a polarity grid which are wrapped with grid oxide on three sides. The source-drain double-doped reconfigurable field effect transistor is characterized in that both the source end and the drain end are double-doped, the tops of the two ends are homogeneously-doped semiconductors, the bottoms are homogeneously-doped semiconductors different from the tops, and a channel is intrinsic silicon or lightly-doped silicon. Compared with an existing Schottky junction tunneling type reconfigurable field effect transistor (SBRFET), a source end is not affected by Fermi level pinning, current symmetry is easier to regulate and control, a large number of electrons and holes can be provided through source-drain double doping, the driving current density is improved, meanwhile, the leakage current is basically the same as that of the SBRFET, and therefore the source-drain double-doped reconfigurable field effect transistor has the more ideal current on-off ratio and and faster logic response.

Description

technical field [0001] The invention belongs to the field effect transistor field in semiconductor devices, in particular to a source-drain double-doped reconfigurable field effect transistor. Background technique [0002] In the long history of the development of integrated circuits, semiconductor devices have followed the trajectory of Moore's Law and developed rapidly. As the process node continues to advance, the scaling of the transistor size has fallen into a bottleneck. At the same time, the quantum effect of the device has become non-negligible, and the short channel effect and hot carrier effect have degraded the performance of the device. Simply relying on technology to improve device performance and integration faces process barriers and economic constraints, and cannot meet the needs of the times. In the post-Moore's Law era, the industry began to focus more on new information processing technologies, new structures, and new materials. [0003] Reconfigurable F...

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to solve the problem of small on-state current of the existing Schottky junction tunneling reconfigurable field effect transistor (SBRFET), and propose a source-drain double-doped reconfigurable field effect transistor, through Change the source and drain carrier injection mechanism, increase the on-state current of the device while keeping the off-state current unchanged, improve the current switching ratio, and reduce the logic response time of the integrated circuit

Images