Power harmonic suppression device
A technology for suppressing device and power harmonics, applied in the direction of measuring device, measuring electrical variables, measuring current/voltage, etc., can solve the problems of high cost, power module failure, complex structure, etc., achieve simple structure, fast response, avoid long-term The effect of working at high voltage
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[0011] The technical solutions of the various embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are only some of the embodiments of the present invention, not all of them.
[0012] The specific implementation manners of the present invention will be described in further detail below in conjunction with the accompanying drawings.
[0013] The power harmonic suppression device includes a harmonic calculation circuit, a pulse width modulation circuit, and a pulse width compensation circuit. The harmonic calculation circuit receives the real-time detected power line harmonic distortion rate signal, and after LC filtering, when the sampling period arrives, That is to say, when the field effect transistor T1 is turned on, it enters the multiplier D1 and the total current signal is multiplied and then outputs the harmonic current. The differential amplifier AR1 is set...
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