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Frequency-adjustable oscillator capable of providing external synchronous clock function

An external synchronization and oscillator technology, which is applied in the direction of pulse generation, electrical components, and electric pulse generation, can solve problems affecting circuit design, electromagnetic interference, and uncontrollable charging and discharging frequency.

Active Publication Date: 2021-09-28
SHENZHEN CYT SEMICON TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] but for figure 1 The traditional oscillator circuit, its charging and discharging frequency cannot be controlled
Moreover, since each circuit module in the electronic system has its own oscillation frequency, the circuit has problems such as intermodulation interference and electromagnetic interference, which may affect the circuit design in severe cases.

Method used

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  • Frequency-adjustable oscillator capable of providing external synchronous clock function
  • Frequency-adjustable oscillator capable of providing external synchronous clock function

Examples

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Embodiment Construction

[0029] The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0030] Such as figure 2 Shown is a diagram of an oscillator with an adjustable frequency and an external synchronous clock function provided by the present invention. This circuit is a relaxation oscillator circuit for switching power supply to generate switching frequency to achieve PWM regulation. In order to achieve adjustable frequency, an off-chip resistor is used to adjust the charge and discharge current to meet the requirements of the operating frequency.

[0031] The circuit uses a unity gain buffer link on the first PIN pin (RT_SYNC) of the external resistor. The input reference voltage of this unity gain buffer is a zero temperature coefficient voltage, and the zero temperature charge and discharge current is generated by dividing this voltage by the external zero temperature resistor. . And because the capacitor C2 / C3 is a zero...

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PUM

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Abstract

The invention discloses a frequency-adjustable oscillator capable of providing an external synchronous clock function. The circuit is a relaxation oscillator circuit which generates switching frequency for a switching power supply and achieves the purpose of PWM (Pulse-Width Modulation) adjustment. And the charging and discharging current is adjusted by arranging the off-chip resistor, so that the frequency is adjustable. In order to meet clock frequency synchronization of the same system, a synchronous external clock circuit is designed, an off-chip resistor is connected with an off-chip capacitor, and one end of the off-chip capacitor can be connected with a clock generator. After the clock generator generates a clock, the pulse is at a high level, and the voltage of the RT_SYNC pin is increased and is greater than the threshold voltage of the internal Schmitt trigger, the falling edge of the pulse triggers the D trigger and further triggers the internal RS trigger to realize frequency synchronization. And meanwhile, the duty ratio of the synchronous clock can be adjusted by changing the off-chip resistor.

Description

technical field [0001] The invention belongs to the technical field of electronic circuits, and in particular relates to an oscillator with adjustable frequency and providing an external synchronous clock function. Background technique [0002] In the field of electronic circuit technology, oscillators are usually used to provide stable and reliable clock signals for system circuits to ensure stable and coordinated work of the circuit system. [0003] Traditional oscillator circuits such as figure 1 shown. The circuit is composed of: a charging and discharging capacitor C, a current limiting resistor R, a lower limit comparator COMP1, an upper limit comparator COMP2, an RS flip-flop, an inverter INV1, and an NMOS transistor M1. Among them, the non-inverting terminal of the upper limit comparator COMP2 is connected to the inverting terminal of the lower limit comparator COMP1, the inverting terminal is connected to the upper limit comparison voltage Vth_L, the output termin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K3/011H03K3/017
CPCH03K3/011H03K3/017
Inventor 刘晨李林喜晋丁亥程天阳
Owner SHENZHEN CYT SEMICON TECH CO LTD
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