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Semiconductor structure and forming method thereof

A technology of semiconductor and dummy gate structure, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems that the performance of stacked nanosheet GAAMOSFET needs to be improved, and achieve the effect of meeting the process requirements

Pending Publication Date: 2021-10-12
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, the performance of stacked nanosheet GAA MOSFETs in the prior art needs to be improved

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] As mentioned in the background, existing GAA FinFETs have a fixed fin width.

[0035] The reasons for the poor performance of the semiconductor structure will be described in detail below in conjunction with the accompanying drawings. Figure 1 to Figure 3 It is a structural schematic diagram of each step of a method for forming a semiconductor structure.

[0036] refer to figure 1 , provide a semiconductor substrate 100, the semiconductor substrate 100 has a fin 110 and an isolation structure 101, the fin 110 includes a first fin layer 111 with several layers stacked along the normal direction of the surface of the semiconductor substrate 100, and two The second fin layer 112 in the first fin layer 111 is layered, and the isolation structure 101 covers part of the sidewall of the fin 110 .

[0037] refer to figure 2 , forming a dummy gate structure 120 across the fin portion 110 ; using the dummy gate structure 120 as a mask, removing the fin portion 110 on both si...

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PUM

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Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the method comprises the steps: a substrate is provided which comprises a first region and a second region; a plurality of first nanowires which are stacked in the normal direction of the surface of the substrate and are separated from one another are formed in the first area, the first nanowires have first sizes in the second direction, and the second direction is perpendicular to the first direction; a second initial fin structure is formed on the second region, the second initial fin structure comprises a plurality of second initial nanowires which are stacked in the normal direction of the surface of the substrate and are separated from one another, and the second initial fin structure extends in the first direction; and the second initial fin structure is etched to enable the second initial nanowire to form a second nanowire, and a second fin structure is formed on the second region, the second fin structure comprising a plurality of second nanowires, the second nanowire having a second size along the second direction, and the second size being smaller than the first size. According to the method, semiconductor structures with different channel widths can be formed, and the process requirements of a gate-all-around nanowire device are met.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the development of semiconductor technology, the electrical control ability of the traditional planar metal-oxide semiconductor field effect transistor (MOSFET) on the channel becomes weaker, and the problem of leakage current becomes more and more significant. Fin Field Effect Transistor (FinFET) is an emerging multi-gate device, which generally includes a fin protruding from the surface of the semiconductor substrate, a gate structure covering part of the top surface and sidewall of the fin, located at the gate The source and drain doped regions in the fins on both sides of the pole structure. In the traditional planar metal-oxide-semiconductor field-effect transistor structure, the gate that controls the passage of current can only control the on and off of the circu...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L21/336H01L29/78
CPCH01L29/0669H01L29/785H01L29/66795
Inventor 王楠
Owner SEMICON MFG INT (SHANGHAI) CORP