Multi-exposure method in photoetching process

Abstract

The invention discloses a multi-exposure method in a photoetching process, which comprises the following steps of: firstly, classifying all devices contained in a chip, and arranging the devices of the same kind in the same area; performing photoetching process development corresponding to different exposure modes for different devices; generating a plurality of exposure units simultaneously on the mask, wherein each exposure unit comprises a single device of a certain type; during exposure, distributing different exposure modes to perform different exposure on different exposure units: in a first illumination mode, the exposure unit 1 is exposed, the device 1 is generated, the wafer is kept still on the platform, and then in a second illumination mode, the exposure unit 2 is exposed, the device 2 is generated, and the operation is repeated until the exposure of all the exposure units is completed; and finally, forming all devices through one-time development. According to the invention, the devices with the same exposure mode are placed in the same exposure unit for different exposure, so that the layout is more compact, and the utilization rate of the chip area is improved.

Description

technical field [0001] The invention relates to the field of semiconductor device manufacturing technology, in particular to a method for multiple exposures in photolithography technology. Background technique [0002] With the development of semiconductor technology, the size limit of lithographic technology transfer graphics has been reduced by 2 to 3 orders of magnitude (from millimeter to submicron), and it has developed from conventional optical technology to the application of electron beams, X-rays, micro ion beams, New technologies such as lasers; the use of wavelengths has been extended from 4000 angstroms to 0.1 angstroms. Photolithography technology has become a precise microfabrication technology. [0003] Photolithography is a technology that transfers the pattern on the mask plate to the substrate under the action of light with the help of photoresist (also known as photoresist). The main process is as follows: first, ultraviolet light is irradiated on the su...

AI Technical Summary

Problems solved by technology

OPC can only help adjust the size of the actually formed pattern, but it cannot change the corresponding lithography process window. In order to take into account different devices, it can only balance between different designs, and finally the total process window will become very small

In order to save area, the traditional layout drawing method often draws different devices together, resulting in the simultaneous formation of multiple different CD graphics in local areas

like figure 1 As shown, it is a simple schematic diagram of a chip layout. Each irregular square in the figure represents a functional unit. In the traditional layout drawing method, different functional units form IP separately. The actual utilization rate of the chip is only about 40%, and the actual chip area is much wasted

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