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Wafer process fault prediction method and device, electronic equipment and storage medium

A fault prediction and wafer technology, applied in CAD circuit design, design optimization/simulation, special data processing applications, etc., can solve problems such as large time and labor costs, cumbersome process troubleshooting process, etc., to achieve rapid prediction and resolution The effect of cumbersome process troubleshooting and reduced detection time

Pending Publication Date: 2021-10-26
SUZHOU CREALIGHTS TECH
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

The silicon photonics wafer inspection unit, that is, the process control monitor (PCM) device is generally evenly distributed on different positions of the silicon photonics wafer. Generally, a large number of PCMs need to be installed on a silicon photonics wafer. For each PCM Performing detection and analysis can lead to cumbersome process troubleshooting process, resulting in large time and labor costs

Method used

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  • Wafer process fault prediction method and device, electronic equipment and storage medium
  • Wafer process fault prediction method and device, electronic equipment and storage medium
  • Wafer process fault prediction method and device, electronic equipment and storage medium

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Embodiment Construction

[0037] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only some structures related to the present invention are shown in the drawings but not all structures.

[0038] figure 1 It is a flow chart of a wafer process failure prediction method provided by an embodiment of the present invention. The method is applicable to the situation of process failure prediction for each process step in the wafer preparation process. Typically, the embodiments of the present application are applicable to the situation of performing process failure prediction on each process step in the silicon photonics wafer preparation process. Specifically, the method can be executed by a process fai...

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Abstract

The embodiment of the invention discloses a wafer process fault prediction method and device, electronic equipment and a storage medium. The method comprises the following steps: determining a detection parameter matrix according to detection parameters fed back by a process control monitoring unit; inputting the detection parameter matrix into a process fault prediction model; and obtaining a prediction result matrix output by the process fault prediction model. The wafer comprises a device placing area, the center of the device placing area, the vertex of an internally tangent N-polygon of the device placing area and the midpoint of the connecting line of the vertex and the center are used as reference points, the wafer further comprises a plurality of photomask areas, and the photomask areas where the reference points are located are provided with process control monitoring units; the prediction result matrix comprises a plurality of first elements, the preparation process of the wafer comprises a plurality of process steps, and different first elements are used for representing the probability of faults in different process steps. According to the technical scheme provided by the embodiment of the invention, the wafer detection time can be shortened, and the process fault prediction of each process step in the wafer preparation process can be realized.

Description

technical field [0001] The embodiments of the present invention relate to the technical field of semiconductors, and in particular to a wafer process failure prediction method, device, electronic equipment, and storage medium. Background technique [0002] Silicon photonics integration technology is a kind of integration of optical waveguide, modulator, detector, wavelength division multiplexing and other devices on a silicon substrate to realize the deep integration of electrical signal processing and optical signal processing. In terms of chip structure and photoelectric hybrid packaging Photonic integration technology with great innovation. Silicon photonics integration technology uses indirect modulation to solve performance bottlenecks such as power consumption and temperature drift caused by multi-channel traditional solutions. Moreover, since silicon photonics integration technology integrates many optical devices, compared with traditional optical solutions, the num...

Claims

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Application Information

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IPC IPC(8): G06F30/33G06F30/27
CPCG06F30/33G06F30/27
Inventor 林天营孙旭陈晓刚
Owner SUZHOU CREALIGHTS TECH
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