A gallium nitride transistor drive control circuit, method, device, and medium
A drive control circuit, drive control technology, applied in the direction of control/regulation systems, electronic switches, electrical components, etc., can solve the problems of device burnout, misleading, and inability to solve GaN direct drive, etc., to avoid false activation, The effect of improving reliability
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Embodiment 1
[0033] Traditional PWM controllers are mainly used to drive silicon MOS devices, and their driving voltage is usually 12V, but the driving voltage requirement of GaN transistors is 6V, so traditional PWM controllers are no longer suitable for driving GaN transistors. At present, many flyback PWM controllers simply change the driving voltage to 6V to drive GaN transistors, such as figure 1 As shown, it is a schematic diagram of the first drive circuit used to drive gallium nitride transistors in the prior art. The first drive circuit changes the output voltage of the Driver pin to 6V on the basis of the existing flyback power supply circuit. But this is far from being able to solve other problems of GaN direct drive. After the GaN transistor is turned off, high-frequency oscillations will occur between the drain-source parasitic capacitance of the GaN transistor and the leakage inductance of the flyback high-frequency transformer, the package parasitic inductance of the GaN tra...
Embodiment 2
[0054] This embodiment is used to provide a driving control method for a gallium nitride transistor, and the driving control method includes:
[0055] In each drive control cycle of the GaN transistor, the following operations are performed:
[0056] Control the Driver pin of the control chip to output a high level, and the ADriver pin to output a low level, until the voltage of the CS pin of the control chip reaches a preset limit value, control the Driver pin to output a low level, so The ADriver pin outputs a low level; after delaying the first dead zone time, the Driver pin is controlled to output a low level, and the ADriver pin is output to a high level until the first preset moment is reached, and the ADriver pin is controlled to output a high level. The Driver pin outputs a low level, and the ADriver pin outputs a low level; after a delay of the second dead time, the next drive control cycle is entered.
[0057] Wherein, until the voltage of the CS pin of the control ...
Embodiment 3
[0063] This embodiment is used to provide a driving control device for GaN transistors, including:
[0064] processor; and
[0065] a memory in which computer readable program instructions are stored,
[0066] Wherein, the driving control method as described in Embodiment 1 is executed when the computer-readable program instructions are executed by the processor.
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