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Hard mask removing method and DRAM manufacturing method

A technology of hard mask and hard mask layer, applied in semiconductor/solid-state device manufacturing, discharge tubes, semiconductor devices, etc., can solve the problems of affecting device performance, complex protective layer process, protective layer residue, etc., and achieve a simple process. Effect

Pending Publication Date: 2022-02-18
INST OF MICROELECTRONICS CHINESE ACAD OF SCI +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The process of setting the protective layer is complex and the protective layer is easily left when the protective layer is removed later, which affects the performance of the device

Method used

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  • Hard mask removing method and DRAM manufacturing method
  • Hard mask removing method and DRAM manufacturing method
  • Hard mask removing method and DRAM manufacturing method

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Embodiment Construction

[0031] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present disclosure.

[0032] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, s...

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Abstract

The invention relates to a hard mask removing method and a DRAM manufacturing method, belongs to the technical field of semiconductors, and solves the problem that a lower layer is damaged or lost if a protective layer needs to be arranged in an existing hard mask removal method. The hard mask removing method comprises the following steps that a semiconductor substrate is provided; a substrate material layer, a layer to be etched and a hard mask layer pattern are sequentially formed on the semiconductor substrate from bottom to top, and the material of the substrate material layer and the material of the hard mask layer are the same or similar substances; the hard mask layer pattern is used as a mask, the layer to be etched is etched to form a contact hole, and the contact hole is a high aspect ratio hole; and the remaining material of the hard mask layer is removed by plasma etching, and the substrate material layer is kept unetched. Under the condition that a protective layer in a high aspect ratio hole is not needed to protect the substrate material layer, the substrate material layer can be kept not etched when the hard mask layer is removed after etching.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a hard mask removal method and a DRAM manufacturing method. Background technique [0002] Memory is a device or component used to store a large amount of information in a digital system, and is an important part of computers and digital devices. Memory can be divided into two categories: Random Access Memory (RAM) and Read Only Memory (ROM). RAM includes DRAM, PRAM, MRAM, etc., and metal components are one of the key components for manufacturing these RAMs. Metal contacts are used to electrically connect metal components with other conductors. [0003] The semiconductor device includes DRAM, and when the process difficulty of the semiconductor device becomes smaller and smaller, the etching process that requires a long time also increases. The existing PR (Photo Resist, photoresist) mask or ACL (Amorphous Carbon Layer, amorphous carbon layer) mask of this process cannot...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/308H01J37/32H01L27/108H10B12/00
CPCH01L21/308H01J37/32009H01J2237/3343H01J2237/3174H10B12/02
Inventor 姜东勋李俊杰周娜李琳王佳
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI