Semiconductor assembly with redistribution structure for die stack signal routing

Abstract

The invention relates to a semiconductor assembly with a redistribution structure for die stack signal routing. Semiconductor devices having redistribution structures and associated systems and methods are disclosed herein. In some embodiments, a semiconductor assembly includes: a die stack including a plurality of semiconductor dies; and a routing substrate mounted on the stack of dies. The routing substrate includes an upper surface having a redistribution structure. The semiconductor assembly also includes a plurality of electrical connectors coupling the redistribution structure to at least some of the stack of dies. The semiconductor assembly further includes a controller die mounted on the routing substrate. The controller die includes an active surface facing the upper surface of the routing substrate and electrically coupled to the redistribution structure such that the routing substrate and the semiconductor die are electrically coupled to the controller die via the redistribution structure.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of U.S. Provisional Application No. 63 / 066,436, filed August 17, 2020, which is hereby incorporated by reference in its entirety. technical field [0003] The present technology relates generally to semiconductor devices, and more particularly, to semiconductor devices having redistribution structures configured to route signals between vertically stacked semiconductor dies. Background technique [0004] Packaged semiconductor die, including memory chips, microprocessor chips, and imager chips, typically include the semiconductor die mounted on a substrate and enclosed in a protective covering. A semiconductor die may include functional features, such as memory cells, processor circuits, and imager devices, and bond pads electrically connected to the functional features. The bond pads can be electrically connected to terminals outside the protective covering to allow the semiconduc...

AI Technical Summary

Problems solved by technology

However, conventional techniques for routing signals to and from vertically stacked semiconductor dies may rely on complex multilayer routing structures within the packaging substrate, which may result in reduced signal integrity, Larger package size and increased manufacturing cost

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