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Digital signal processor capable of directly supporting multi-operand additive operation

An addition operation and multi-operand technology, applied in the direction of electrical digital data processing, digital data processing components, instruments, etc., can solve problems such as multi-logic resources and affecting the performance of addition operations, so as to avoid waste of resources, reduce area, and improve performance effect

Pending Publication Date: 2022-02-25
EHIWAY MICROELECTRONIC SCI & TECH SUZHOU CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is currently no DSP hard core that can directly support multi-operand addition operations
FPGA can only use on-chip logic resources to implement multi-operand addition, but this method to achieve multi-operand addition not only consumes too many logic resources, but also affects the performance of addition operations

Method used

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  • Digital signal processor capable of directly supporting multi-operand additive operation
  • Digital signal processor capable of directly supporting multi-operand additive operation
  • Digital signal processor capable of directly supporting multi-operand additive operation

Examples

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Embodiment Construction

[0062] Such as figure 1 As shown, the digital signal processor that can directly support multi-operand addition of the present invention includes:

[0063] The input register group S101 is used to process the input data;

[0064] Customized multiplier S102, the input terminal is connected to the output terminal of the input register set S101, and is used to realize multiplication operation or multi-operand addition operation;

[0065] The first general multiplier S103a, the input terminal is connected to the output terminal of the input register set S101, and is used to realize the multiplication operation;

[0066] The second universal multiplier S103b, the input terminal is connected to the output terminal of the input register set S101, and is used to realize the multiplication operation;

[0067] The third general multiplier S103c, the input terminal is connected to the output terminal of the input register set S101, and is used to realize the multiplication operation; ...

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PUM

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Abstract

The invention discloses a digital signal processor capable of directly supporting multi-operand additive operation. The digital signal processor comprises an input register set, a customized multiplier, a first general multiplier, a second general multiplier, a third general multiplier, a first summator, a second summator, an addition output register, an addition / accumulator, a chain type summator and an output register. By customizing a multiplier implementation structure in the DSP architecture, the customized multiplier can be configured into a multiplication mode or support an eight-operand addition mode, so that the DSP can directly support multi-operand addition operation.

Description

technical field [0001] The invention belongs to the technical field of digital integrated circuits, and in particular relates to a digital signal processor that can directly support multi-operand addition operations. Background technique [0002] With the development of semiconductor technology and microelectronics technology, the information and signal processing technology of the circuit system is becoming more and more advanced, which can transmit faster rate signals and realize more complex algorithms. At the same time, digital signal processing has independently developed into a very important and mature technology, and has replaced traditional analog signal processing in many application fields, such as audio and video processing, digital image processing, sonar and radar, biomedical signal analysis, Precision-guided weapons and other fields have profoundly affected the development of contemporary society. However, in the face of larger calculation-intensive tasks, th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/509G06F7/523
CPCG06F7/509G06F7/523
Inventor 陈三林蔡刚黄志洪
Owner EHIWAY MICROELECTRONIC SCI & TECH SUZHOU CO LTD
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