Full-period digital time converter based on clock calibration technology

A digital time and clock calibration technology, used in time-to-digital converters, electrical unknown time interval measurement, devices for measuring time intervals, etc. , to achieve the effect of high linearity, easy implementation and improved accuracy

Active Publication Date: 2022-03-08
PEKING UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the error of the multi-phase clock in the existing digital time converter chip, its integral nonlinearity will have a fixed de

Method used

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  • Full-period digital time converter based on clock calibration technology
  • Full-period digital time converter based on clock calibration technology
  • Full-period digital time converter based on clock calibration technology

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Embodiment Construction

[0037] Below through embodiment and in conjunction with appendix Figure 2-5 , the present invention is described in detail.

[0038] This embodiment is a 12-bit full-cycle digital-to-time converter chip based on clock calibration technology with an operating frequency of 1.5 GHz in a standard CMOS process. attached figure 2 The overall architecture of the digital-to-time converter is shown. The input signal is a 6GHz single-ended signal and is connected to the input of the single-slip circuit. The output differential signal is connected to the input of the 4-frequency divider, and the 4-frequency divider generates 1.5 The eight-phase clock of GHz is connected to the input end of the 3-bit multiplexer after the buffer with adjustable delay. In normal digital-to-time conversion mode, the switch S 1 and S 2 The output of the control multiplexer is connected with the input end of the 9-bit phase interpolator, and a 12-bit numerically controlled time signal is output to contr...

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PUM

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Abstract

The invention discloses a full-period digital time converter based on a clock calibration technology, which is characterized by comprising a single-to-differential circuit used for converting an input single-ended signal into a differential signal and inputting the differential signal into a multi-phase clock signal generation unit; the multi-phase clock signal generation unit is used for generating a multi-phase clock signal according to an input differential signal and inputting the multi-phase clock signal into the adjustable delay module; the adjustable delay module is used for delaying the multi-phase clock signal according to the output signal of the digital module and then inputting the delayed multi-phase clock signal into the multiplexer; the multiplexer is used for selecting a group of adjacent two-phase signals to output according to the switch control signal generated by the digital module; the phase interpolator is used for generating numerical control time signals according to two adjacent phase signals; the time-to-digital converter is used for calculating the time difference of rising edges of two adjacent phase signals and inputting the time difference to the digital module; and the digital module is used for generating a delay control signal of the adjustable delay module on the multiphase clock signal and a switch control signal according to the time difference of the rising edges of each group of adjacent two-phase signals.

Description

technical field [0001] The invention belongs to the technical field of radio frequency integrated circuits, and relates to a full-cycle digital time converter, which is applied to polar coordinate or phase difference digital transmitters, clock data recovery, time domain analog-to-digital converters, etc., and especially relates to a clock calibration technology, Used to improve the linearity of full-cycle digital-to-time converters. Background technique [0002] A full-cycle digital-to-time converter is a circuit module often used in the technical field of radio frequency integrated circuits. Polar or phase-difference digital transmitters can use full-cycle digital-to-time converters as phase modulators, and their linearity will affect the vector magnitude error, adjacent channel ratio, and other performance of the transmitter. A clock data recovery system can use a full-cycle digital-to-time converter as an eye opening detection, and its linearity will affect the accuracy...

Claims

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Application Information

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IPC IPC(8): G04F10/00
CPCG04F10/005
Inventor 刘军华姜皓云宿小磊廖怀林
Owner PEKING UNIV
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