Silicon carbide MOSFET device with improved gate bottom charge balance and manufacturing method thereof

Abstract

The invention relates to a silicon carbide MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device with improved gate bottom charge balance and a manufacturing method thereof, the device comprises an epitaxial wafer structure with a charge balance column, an embedded gate structure, a source electrode structure positioned on the top layer and a drain electrode structure positioned on the bottom layer, and a grooved channel compliant layer is formed on a silicon carbide epitaxial layer of the epitaxial wafer structure. Non-planar ohmic contact is formed by the source electrode structure and the epitaxial wafer structure through the contact grooves located in the two sides of the grid electrode structure. A charge balance column located below a gate trench and a contact trench and basically formed by a preset laminated well is utilized to prevent the charge balance column from penetrating into a silicon carbide substrate of an epitaxial wafer structure. The method has the effect of standardizing the bottom depth and appearance of the gate bottom charge balance junction to be in a relatively good section column shape, so that the defects that the injection concentration of the charge balance junction cannot be adjusted, a junction side column cannot be formed and the electrical performance is unstable due to the fact that the depth of the junction bottom changes along with the depth of the groove on the basis of the arrangement of the channel compliant layer are overcome.

Description

technical field [0001] The invention relates to the technical field of silicon carbide MOSFET devices, in particular to a silicon carbide MOSFET device with improved gate bottom charge balance and a manufacturing method. Background technique [0002] In the existing technology of silicon carbide third-generation semiconductor devices, the bandgap width exceeds 2.0eV under off, and it has the advantages of higher critical breakdown electric field capability, higher thermal conductivity and more saturated electron mobility. Advantages, it is suitable for manufacturing high-power, high-temperature, high-frequency and radiation-resistant semiconductor devices. The gate of silicon carbide semiconductor devices is usually planar, and the channel path is lateral; for example: CN104409501A, CN111933698A. In order to improve the integration density of silicon carbide devices, it has been proposed to make embedded gates in silicon carbide devices, and the channel path is vertical; for...

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Problems solved by technology

[0004] The main purpose of the present invention is to provide a silicon carbide MOSFET device. The main progress is to make the bottom depth and shape of the charge balance junction at the bottom of the gate subject to a relatively good cross-sectional cylindrical specification, so as to solve the problem of the bottom of the charge balance junction in the silicon carbide MOSFET device. Unstable electrical properties caused by trench depth errors and unadjustable concentration of charge balance junctions

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