Semiconductor device and manufacturing method thereof

Abstract

The invention discloses a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a substrate; the gate stack structure is positioned on the substrate; a plurality of openings penetrating through the gate stack structure; a slot penetrating through the gate stack structure; the sacrificial layer, the barrier layer and the contact structure are located in the open groove; the insulating layer is used for forming a first air gap in the plurality of holes and realizing electrical isolation among the barrier layer, the contact structure and the gate stack structure, the contact structure penetrates through the insulating layer and the barrier layer, the sacrificial layer and the barrier layer are separated by the insulating layer, and a part of the barrier layer extends to the upper part of the sacrificial layer. According to the semiconductor device, the distance between the first end part and the second end part of the barrier layer and the contact structure is increased, so that the possibility that the second air gap is in contact with the contact structure is greatly reduced, and the yield and the reliability of the semiconductor device are improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and more particularly, to a semiconductor device and a manufacturing method thereof. Background technique [0002] The development direction of semiconductor technology is the reduction of feature size and the improvement of integration. For storage devices, the improvement of the storage density of the storage device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. [0003] In the manufacturing process of semiconductor devices, more and more air gaps are used as dielectric layers. Using air gaps as dielectric layers has many advantages. For example, the use of air gaps is conducive to the reduction of feature sizes, In addition, in the manufacturing process of the NAND flash memo...

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Problems solved by technology

[0004] However, in the process of forming the air gap, parasitic voids are often formed at the same time. Since the feature size of the semiconductor manufacturing process is getting smaller and smaller, once these parasitic voids are close to the key structures of the semiconductor device, it will greatly reduce the performance of the semiconductor device. yield and reliability, even unusable

See figure 1 , figure 1 It is a cross-sectional image of a NAND semiconductor device observed by a scanning electron microscope. In the process step of forming the air gap 1, parasitic cavities 2 and 2' are formed between the selection tubes, and the cavities 2 and 2' are respectively close to the selection tube. The contact structure 3 and 3' (contact hole) between the tubes, in which the cavity 2' and the contact structure 3' are close to each other, so the cavity 2' has a great adverse effect on the semiconductor device

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