Method for solving chip timing sequence deterioration caused by metal filling Metal Fill
A metal filling, timing technology, applied in instrumentation, computing, electrical digital data processing, etc., can solve the problems affecting the design cycle and the final actual chip timing deterioration.
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[0011] The technical solutions of the present invention will be further described in detail below through the accompanying drawings and embodiments.
[0012] Embodiments of the present invention provide a method for solving chip timing deterioration caused by metal filling. The main method steps are as follows: figure 1 shown, including:
[0013] Step 110, in the layout and routing step, obtain the setup time (setup time) and the hold time (hold time) of each timing endpoint (timing endpoint) on each timing path (timing path) in the chip;
[0014] Specifically, the setup time and the hold time can be obtained through the functions provided by the Place&Route tool.
[0015] Step 120: Determine the first violation time corresponding to the setup time violation (setup timeviolation) and the second violation time corresponding to the hold time violation (hold time violation) at each timing endpoint according to the clock cycle of the chip;
[0016] Specifically, the time violati...
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