Self-purification method for reducing Dimple rate in Gringing process

Abstract

The invention discloses a self-purification method for reducing the Dimple rate in the Gringing process, and the self-purification method comprises the following steps: S1, firstly preparing a silicon wafer material needing to be processed for later use, releasing vacuum through Table to generate suction force, adsorbing the silicon wafer needing to be processed onto the surface of the silicon wafer material, and grinding and purifying the silicon wafer in real time from the upper side by adopting a grinding wheel; and S2, in the grinding and purifying process, the rotating speed of the Table can be adjusted in real time by personnel according to the actual grinding and purifying requirements, so that the rotating speed of the Table is adjusted to be reduced to the minimum, the influence of centrifugal force is effectively reduced, and the problems that the edge is not provided with ceramic holes, edge impurities are not easy to remove, and the edge Dimple has greater influence on the subsequent process are solved. And the subsequent process is difficult to repair. Through the optimization of the purification mode, the Dimple rate in the Gringing process can be greatly reduced in a floating manner, the problem that the Dimple is located on the edge in the Gringing process can be avoided, the silicon wafer is prevented from being scrapped due to poor nanometer morphology, and the product yield is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a self-purification method for reducing the Dimple rate of a Grinding process. Background technique [0002] With the rapid development of the IC industry, the chip size continues to increase, the integrated circuit design line width continues to decrease, and the quality requirements for the interior of the silicon material crystal and the surface of the silicon wafer are getting higher and higher. The requirements for the surface of silicon materials are becoming more and more stringent, and the quality of the surface directly affects the processing quality and yield of the device. The change trend is consistent with the change of the nanometer topography on the surface of the silicon wafer, which is a good indication that the nanometer topography has a very direct impact on the quality of lithography. On a silicon wafer with large rice grains, 160,000 trans...

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a self-purification method that reduces the Dimple rate of the Grinding process, to solve the problem of Dimple in the existing silicon wafer manufacturing Grinding proposed in the above-mentioned background technology, which seriously affects the nano-morphology, so the Grinding process is reduced. The Dimple rate is very important, and at the same time, the scrap rate of silicon wafers is greatly increased, which increases the overall cost of production and processing.

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