Edge capacitor, integrated circuit and manufacturing process for edge capacitor
A technology of integrated circuit and manufacturing process, applied in the field of fringe capacitors, to achieve the effect of increasing the complexity of the process
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[0031] figure 1 is a simplified cross-sectional view of capacitor C according to the present disclosure. The capacitor is formed monolithically on a silicon substrate Si, which is covered by a gallium nitride GaN layer. The GaN layer may be further covered by a non-conductive layer. The non-conductive layer can be made of eg SiO 2 or SiON or any low-k or high-k dielectric or silicon nitride (Si 3 N 4 )production. The illustrated structure of capacitor C is also referred to as a fringe capacitor. The capacitor C comprises a first structure E1 (first electrode) made of a metal layer MET and a second structure E2 (second electrode) made of the same metal layer MET and between the first structure E1 and the second structure E2 The dielectric layer (also known as the protective layer PO). The dielectric layer / protective layer PO has a relative permittivity greater than that of silicon oxide. The dielectric constant of the dielectric / protective layer may be greater than 4 or...
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