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Three-dimensional packaging structure and packaging method of power device

A power device and three-dimensional packaging technology, which is applied in the manufacture of semiconductor devices, electrical solid state devices, semiconductor/solid state devices, etc., can solve the problems of increasing the number of bonding wires, decreasing device performance and yield, etc., to improve performance, reduce parasitic effects, The effect of reducing the number of wires

Pending Publication Date: 2022-08-02
天狼芯半导体(成都)有限公司
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Problems solved by technology

[0004] In view of this, the embodiment of the present application provides a three-dimensional packaging structure and packaging method for power devices, aiming to solve the problem of a decrease in the performance and yield of the device due to the increase in the number of bonding wires when packaging the power device

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  • Three-dimensional packaging structure and packaging method of power device
  • Three-dimensional packaging structure and packaging method of power device
  • Three-dimensional packaging structure and packaging method of power device

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Embodiment Construction

[0049] In order for those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are of the present invention. Some examples, but not all examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0050] The term "comprising" and any variations thereof in the description and claims of the present invention and the above drawings are intended to cover non-exclusive inclusions. For example, a process, method or system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes unlisted steps or units, o...

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Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to a three-dimensional packaging structure and packaging method of a power device, and the three-dimensional packaging structure of the power device comprises a lead frame which is provided with a bonding pad used for connecting the power device; the first power device is arranged on the lead frame in an inverted mode; the second power device is stacked on the first power device; wherein a bottom terminal of the first power device is fixedly connected with a bonding pad of the lead frame, and a top terminal of the first power device is electrically connected with a bottom terminal, close to the first power device, of the second power device in a copper strip bonding mode. And the bottom terminal of the first power device is also electrically connected with the top terminal of the second power device in a copper strip bonding manner. Through stacking the power devices, the number of routing required by packaging is reduced, the influence of a parasitic effect is reduced, the performance of the power devices is improved, and the product yield is greatly improved.

Description

technical field [0001] The present application belongs to the technical field of semiconductors, and in particular, relates to a three-dimensional packaging structure and packaging method of a power device. Background technique [0002] The traditional power device realizes the connection of the external pins of the power device chip through wire bonding. The larger and more complex power devices require the bonding of more external pins, and thicker gold or aluminum wires are required. To maintain a high current flow, the performance of the power device is degraded due to the parasitic effect caused by the wire bonding. In order to obtain greater withstand voltage or greater overcurrent capability, it is necessary to connect multiple single power devices in parallel or in series, in some special device applications such as insulated gate bipolar transistors (Insulated Gate Bipolar Transistor, IGBT), Since there is a trailing current when the IGBT is turned off, it needs to...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/495H01L25/07H01L21/56
CPCH01L23/49541H01L23/49524H01L25/074H01L21/563H01L2224/40H01L2224/73253
Inventor 曾健忠
Owner 天狼芯半导体(成都)有限公司
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