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Embedded image processor

An image processor and embedded technology, applied in image communication, television, electrical components, etc., can solve the problems of complex functional verification, high power consumption, and long development cycle.

Inactive Publication Date: 2005-12-28
HUAZHONG UNIV OF SCI & TECH
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Problems solved by technology

[0010] Field Programmable Gate Array (FPGA) implementation: JPEG2000 itself is a very complex algorithm, and it processes the entire picture, which requires a huge amount of memory, which is very unfavorable for FPGA implementation. In addition, FPGA programming is complicated, Long development cycle, complex functional verification, and high power consumption are also factors restricting this solution.

Method used

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Embodiment Construction

[0047] figure 1 It is a kind of implementation mode of hardware structure of the present invention; There are two sets of video acquisition programmable logic device CPLD and two slices of static memory SRAM corresponding thereto, two slices of CPLD gather odd number frame and even number frame image respectively, and a slice of SRAM is used for gathering at the same time For video images, another piece of SRAM is used as the image buffer of DSP; the image compression module is composed of two completely independent digital signal processors DSP and corresponding synchronous dynamic memory SDRAM, which are respectively responsible for the compression and storage of odd-numbered and even-numbered frames. Two pieces of DSP are used for parallel operation, which can meet the demand of operation amount.

[0048] According to the design goal, the following chips can be selected:

[0049] ●The image processor uses TI's cost-effective floating-point DSP-TMS320C6713, and uses PQFP pa...

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Abstract

The invention relates to a multifunctional integration embedded static image compression system, wherein the image gathering module comprises a video decoder, a video gathering programmable logic device and the corresponding static storage, the image compression module comprises a digital signal processor for preliminary treatment, small wave conversion, entropy encoding, rate control and packing with the corresponding synchronous dynamic memory, and the data transmission module comprises a main controller and a general purpose serial controller. The invention realizes visualized control for rate flow with the transmission velocity of flow compression as high as 480Mbps.

Description

technical field [0001] The invention belongs to an image processing device, in particular to an embedded static image compression system with multiple functions integrated. Background technique [0002] With the wide application of multimedia technology, a new generation of static image compression standard JPEG2000 emerged at the historic moment to meet users' requirements for higher compression efficiency, interactivity and scalability of compressed images. [0003] "Higher compression ratio, higher image quality, lower bit rate" is a generalization of the basic characteristics of JPEG2000. In addition, JPEG2000 also provides a set of new features, such as progressive transmission, special processing of regions of interest, etc. These characteristics are very important for some new products (such as digital cameras) and applications (such as the Internet). In addition, similar to the first set of international static image compression standard JPEG and its dynamic JPEG (M...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N19/13H04N19/146H04N19/156H04N19/42H04N19/63H04N19/70
Inventor 朱光喜吴薇张江山
Owner HUAZHONG UNIV OF SCI & TECH
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