Electronic sealer with three-dimensional stack and assembling method thereof
An electronic package and three-dimensional stacking technology, which is applied in the direction of electrical components, electric solid devices, circuits, etc., can solve the problems of complex manufacturing process, unstable pass rate, and increased packaging cost
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[0015] In order to have a further understanding of the purpose of the present invention, structural features and functions thereof, the accompanying drawings are described in detail as follows:
[0016] Please refer to Figure 1A to Figure 1E , which is a schematic diagram of the production process of the first embodiment of the present invention. like Figure 1A As shown, first utilize stud bump (stud bump) method to make several stud-shaped conductive bumps 11 on the carrying surface of substrate 10; Figure 1B As shown, a chip 20 with several through holes 21 corresponding to the columnar conductive bumps 11 is provided; then, the chip 20 and the substrate 10 are assembled, as Figure 1C As shown, the columnar conductive bump 11 is aligned through the through hole 21 of each chip 20, and the tail end of the columnar conductive bump 11 exceeds the height of the chip 20; thus, the chip 20 and the substrate 10 are bonded to form the first layer. Electronic packages. In addi...
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