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Silicon nitride memory and a process for making it

A technology for storage devices and manufacturing methods, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve problems such as difficulties and achieve the effect of avoiding leakage current

Inactive Publication Date: 2007-08-08
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, it is very difficult to form a charge trapping layer pattern or pitch smaller than 0.15 microns to solve the above leakage current situation under the limitation of the current lithography process.

Method used

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  • Silicon nitride memory and a process for making it
  • Silicon nitride memory and a process for making it
  • Silicon nitride memory and a process for making it

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Experimental program
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Embodiment Construction

[0033] As shown in FIG. 2, it is shown as a top view of a silicon nitride storage device according to a preferred embodiment of the present invention; as shown in FIGS. Schematic cross-section of the fabrication process for silicon memory.

[0034] Please refer to FIG. 2 and FIG. 3A, FIG. 3A is a schematic cross-sectional view taken from I-I' in FIG. 2 . Firstly, a charge trapping layer 208 is formed on a substrate 200, wherein the charge trapping layer is formed by stacking a silicon oxide layer 202, a silicon nitride layer 204, and a silicon oxide layer 206 (ONO). Next, a patterned photoresist layer 210 is formed on the charge trapping layer 208 . In addition, a bottom anti-reflection layer (BARC) 212 is formed on the bottom layer of the photoresist layer 210 .

[0035] Afterwards, please refer to FIG. 2 and FIG. 3B. FIG. 3B is a schematic cross-sectional view taken from I-I' in FIG. 2 . After forming the photoresist layer 210 , an ion implantation step 214 is performed u...

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Abstract

The invention discloses a silicon nitride memory and a process for making it comprising, forming in sequence an electric charge trapping layer and a first photoresistive layer on a substrate, then using the photoresistive layer as a ion implanting shielding screen to form a bit line in the substrate. later forming a first lining layer not reacting with the electric charge trapping layer on at least the side surface of the photoresistive layer, and using the first lining layer and the photoresistive layer as an etching shielding screen figuring electric charge trapping layer to form a bar shape electric discharge trapping layer. After removing the first lining layer and the photoresistive layer, forming a insulation layer on the substrate surface above the bit line, and forming a character line on the bar shape electric discharge trapping layer and the insulation layer at a direction perpendicular to the bit line direction. Later forming a second lining layer not reacting with the bar shape electric charge trapping layer on the surface of the character line, then using the second lining layer as an etching shielding screen figuring electric charge trapping layer to form a plurality of block shape electric discharge trapping layer, then removing the second lining layer.

Description

technical field [0001] The present invention relates to a memory device and its manufacturing method, and in particular to a silicon nitride memory device (Nitride ROM, NROM) and its manufacturing method. Background technique [0002] Flash memory is an electrically erasable programmable read-only memory (EEPROM), which has the advantages of being writable, erasable, and able to save data after power failure, and is widely used in personal computers and electronic devices. memory device. In addition, flash memory is a kind of non-volatile memory (Non-Volatile Memory; NVM), which has the advantages of small size, fast access speed and low power consumption, and because of its data erasing (Erasing) When using the "block by block" (Block by Block) erasing method, it has the advantage of faster operation. [0003] Typical flash memory uses doped polysilicon to make the floating gate and control gate. When programming (Program), the electrons injected into the floating gate w...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8247H01L27/10H01L27/115H01L21/8239H10B69/00H10B99/00
Inventor 钟嘉麒
Owner MACRONIX INT CO LTD