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Method of annealing electroplate metals

A technology of electroplating metal and annealing, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc.

Inactive Publication Date: 2003-10-08
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, if figure 1 Shown is a schematic diagram of the electroplated copper structure. At the junction of the electroplated copper lattice 101, in the high-temperature post-electroplated copper annealing process, due to the accumulation of excessive internal stress in the electroplated copper layer, many protrusion defects 102 will be generated. (hillock defect)
However, after completing the CMP process and depositing the copper barrier layer, there are still numerous protrusion defects, which will become more severe in the subsequent step of depositing the dielectric layer in the damascene process.

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  • Method of annealing electroplate metals
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  • Method of annealing electroplate metals

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Embodiment Construction

[0014] Some embodiments of the present invention are described in detail as follows. However, in addition to the following semiconductor components applied to silicon substrates, the invention can also be widely implemented in other embodiments, eg on different semiconductor materials (GaAs, Ge). Therefore, the present invention is not limited to components made of silicon semiconductor materials, but includes components made of other semiconductor materials, and the scope of the present invention is not limited, but subject to the patent protection scope defined by the claims .

[0015] In addition, various parts of the semiconductor device are not drawn in actual size. The ratio of certain dimensions relative to other parts is exaggerated to provide a clearer description and to help those skilled in the art to understand the present invention.

[0016] A method of annealing an electroplated metal of the present invention includes providing a semiconductor structure, such a...

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Abstract

First, the semiconductor structure including multiple semiconductor elements such as one base electrode, one emitter, one collector area and the field oxidation area are provided. Next, the dielectric layer is formed on the semiconductor structure. Then, using traditional microfilm technique and etching procedure form the opening in the dielectric layer touching to the part of the semiconductor structure. The electroplated metal layer is formed on the dielectric layer and filled in the said opening. Finally, annealing process is carried out in the electroplated metal layer formed by the electroplating process through chemical vapor deposition method under promotion of ammonia plasma.

Description

(1) Technical field [0001] The invention relates to a method for tempering electroplated metal; in particular, it relates to a method for tempering electroplated copper. (2) Background technology [0002] As those skilled in the art know, as VLSIC devices continue to shrink, the RC delay time of the interconnection metal lines will limit the performance of the device at high speed operation. Therefore, using a copper process (resistance value 1.7mΩ-cm) can effectively solve this problem. In addition, low production cost and good reliability are also one of the key reasons for replacing aluminum with copper. The best way to realize the copper process is to use the electroplating method, which is due to its low cost, high output efficiency, excellent hole filling ability, good electrical properties and easy compatibility with low-K materials. Due to the self-annealing property of electroplated copper at room temperature and the stress generated in component manufacturing, a ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C25D5/50C25D7/12H01L21/288
CPCC25D5/50C25D7/12H01L21/2885H01L21/76883C25D7/123
Inventor 杨能辉黄国峰谢宗棠
Owner UNITED MICROELECTRONICS CORP