Polishing compositions for controlling metal interconnect removal rate in semiconductor wafers

A polishing composition, a technology for the composition, applied in polishing compositions containing abrasives, semiconductor/solid-state device manufacturing, processes for producing decorative surface effects, etc., can solve the problem that the removal rate of low-k dielectric materials cannot be achieved, Inability to achieve paste adjustment, inability to prevent sinking of low-k dielectric layers, etc.

Inactive Publication Date: 2005-11-23
ROHM & HAAS ELECTRONICS MATERIALS CMP HLDG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the polishing composition does not prevent dishing of the low-k dielectric layer and does not enable control of the removal rate of the low-k dielectric material
In addition the composition does not allow adjustment of the slurry
[0005] There remains an unmet need for aqueous polishing compositions that can be used to control the removal rate of non-ferrous interconnect metals and to control the removal rate of low-k and ultra-low-k dielectric materials

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0035] The terms of materials used in the polishing compositions of the following examples are shown in Table 1 below. Klebosol 1501-50 is a silica available from Clariant having 30 wt% silica particles with an average particle size equal to 50 nm and a pH of 10.5-11. The sample was diluted to 12 wt% silica particles by using deionized water.

[0036] the term

[0037] This example serves to demonstrate that polishing compositions containing polyvinylpyrrolidone and polyvinyl alcohol can be effectively used to modify the removal rate of copper while reducing the removal rate of low-k and ultra-low-k dielectrics such as carbon doped oxides . The polishing tests utilized a Mirra type wafer polisher supplied by Applied Materials. The polishing pad was IC1010 from Rohm and Haas Electronic Material CMP Technologies TM . Condition the pad before each run. The polishing process was performed at a pressure of 13.78 kPa (2 psi), a table speed of 120 revolutions per minu...

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PUM

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Abstract

A polishing composition suitable for polishing semiconductor substrates comprises 0.001 to 2 wt % of a thermoplastic polymer; and 0.001 to 1 wt % of polyvinylpyrrolidone; wherein varying the weight ratio of thermoplastic polymer to the polyvinylpyrrolidone controls the removal rate of the non-ferrous interconnect.

Description

technical field [0001] The present disclosure relates to the polishing of semiconductor wafers and, more particularly, to polishing compositions and methods for controlling the removal rate of metal interconnects in semiconductor wafers. Background technique [0002] The semiconductor industry uses interconnect metals to form integrated circuits on semiconductor wafers. These interconnect metals are preferably non-ferrous metals. Suitable examples of such non-ferrous interconnect metals are aluminum, copper, gold, nickel, and platinum group metals, silver, tungsten, and alloys comprising at least one of the foregoing metals. These interconnect metals have low resistivity. Copper metal interconnects provide excellent electrical conductivity at low cost. Because copper is readily soluble in many dielectric materials, such as silicon dioxide and doped silicon dioxide, integrated circuit manufacturers typically employ diffusion barriers to prevent copper from diffusing into t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B24B37/00B24B1/00B44C1/22C08J5/14C09K3/14H01L21/304
CPCC09G1/02C09K3/1409H01L21/7684C09K3/1436H01L21/3212C09K3/1463A01K91/03A01K93/00
Inventor R·L·小拉维J·匡西叶倩萩
Owner ROHM & HAAS ELECTRONICS MATERIALS CMP HLDG INC
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