Array substrate for LCD and fabrication method thereof

Abstract

Disclosed is an array substrate of an LCD, and a method for fabricating it, which simplifies the fabrication process, thereby reducing fabrication costs. The process is simplified because the array substrate does not have a passivation film. The thin film transistors on the array substrate each have an active layer that is protected from contamination by forming a channel insulation layer on the active layer through a dry-etching process. Further, the gate line, gate pad, and gate electrode may have a two-layer structure having a low-resistance metal layer and a barrier metal layer, or a three-layer structure having a low-resistance metal layer and two barrier metal layers.

Description

technical field [0001] The present invention relates to a liquid crystal display (LCD), and more particularly, to an LCD array substrate and a manufacturing method thereof, the method having fewer mask processes. Background technique [0002] As modern society rapidly shifts to an information-oriented society, demands for flat panel displays having superior performance advantages such as thin profile, light weight, and low power consumption and high-quality color reproduction have increased. A liquid crystal display (LCD), one of such flat panel displays, has been developed to meet this demand. [0003] Generally, an LCD includes two substrates each having electrodes formed on an inner surface. Two substrates are arranged to face each other, and a liquid crystal material is injected into a gap between the two substrates. LCDs display images by applying voltages to electrodes such that an electric field is generated within a liquid crystal material. The electric field cont...

AI Technical Summary

Problems solved by technology

[0015] In addition, since the array substrate has a passivation layer on its entire surface including TFTs, expensive plasma-enhanced chemical vapor deposition (PECVD) equipment is generally required, which leads to an increase in manufacturing cost

[0016] In addition, since the passivation layer has a contact hole to connect the drain electrode and the capacitor electrode with the pixel electrode, the photolithography process for forming the contact hole is increased, which may increase the manufacturing cost and the risk of open failure of the data line

[0017] Product failure may occur due to the stepped portion of the contact hole during formation of the pixel electrode, and picture quality may deteriorate due to point defects

Also, if the passivation layer is not formed uniformly, it may reduce the storage capacitance, which may lead to spotty failures on the screen

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