Efficient storage and relating method

Abstract

This invention provides a memory and a related method, in which, a discharge module and a assistant module are placed on each connection line in a storage unit array of a memory, when accessing a storage unit on a line, the discharge module will keep the level of said line at a low level, and the storage unit can influence the level of said line according to its data content, if the datum is a first value, then the storage unit will pull up the level of said line, contrarily, it will not change it, when the storage unit begins pulling up the level of said line, the assistant module on said line will be started to speed up the rising of the level to increase the access efficiency. The power loss of pre-charging to ordinary memories can be avoided as discharge modules operating independentlyon each line.

Description

technical field [0001] The present invention relates to a high-efficiency memory and its related method, in particular to a read-only memory and its related method which have independent discharge modules and auxiliary modules on each line to reduce power consumption and improve access performance. Background technique [0002] In the modern information society, all kinds of files, materials and data can be transmitted, managed and stored in the form of electronic signals, and all kinds of memory / storage circuits that can perform data access have also become various electronic devices. / Indispensable hardware circuit of information device. Among them, the read-only ROM can store data in a non-volatile manner, and its application range is wider. For example, in the digital signal processing circuit / chip, or in the communication chip used for signal encoding / modulation in the mobile phone, a read-only memory will be set to store the signal processing program code (code) or ot...

AI Technical Summary

Problems solved by technology

[0005] However, as can be seen from the above description of the existing memory, the existing memory still has some technical shortcomings to be improved. One of them is a large amount of power consumption caused by precharging. When reading a memory cell and starting an access cycle , the existing memory must fully precharge all the row lines, which will consume a lot of power. Another disadvantage is that the transistors in the memory cell will fight against each other with the sustain circuit, making it difficult to access data. The time required will increase. As mentioned in the previous paragraph, for the memory cells that record the digital "0", these memory cells need to discharge the row line to the low level with the transistor turned on to make the sense amplifier It can correctly judge the recorded value. However, since the row connection has been precharged to a high level at the beginning of the access cycle, the transistor in the memory cell needs to be turned on for a period of time to change the row connection voltage from high to high. The level is pulled down to a low level. However, when the memory cell starts to discharge the row connection, the sustain circuit will resist the discharge of the memory cell because of maintaining the high level of the row connection; in this way, the memory cell will It takes more time to pull the voltage of the row line down to a low level. In other words, it takes a long time for the existing memory to complete an access cycle, which also reduces the access performance of the existing memory.

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