Methods of forming hemisperical grained silicon on a template on a semiconductor work object

Abstract

The present invention provides a method of preparing a surface of a silicon wafer for formation of HSG structures. The method contemplates providing a wafer having at least one HSG template comprising polysilicon formed in BPSG, the HSG template being covered by silicon dioxide. The wafer is treated with a cleaning agent to clean the surface of the wafer. Next, the wafer is treated with a conditioning agent. The conditioning agent removes native oxide from the HSG template without excessively etching structural BPSG. Preferably, the conditioning agent also removes a thin layer of polysilicon on the HSG template. The wafer is then transferred to a process chamber for HSG formation.

Description

[0001] This invention claims the benefit of co-pending U.S. application Ser. No. 10 / 361,107, entitled “Method Of Forming Hemispherical Grained Silicon On A Template On A Semiconductor Work Object”, filed Feb. 7, 2003 which is a continuation of U.S. application Ser. No. 09 / 303,385, entitled Method Of Forming Hemispherical Grained Silicon On A Template On A Semiconductor Work Object”, filed May 1, 1999, the entire disclosures of which are hereby incorporated by reference as if set forth in their entireties for all purposes.BACKGROUND OF THE INVENTION [0002] The present invention relates to a method of cleaning and conditioning a semiconductor work object, such as a silicon wafer, so that subsequent process steps produce desired results. More particularly, the present invention provides a method of cleaning and etching a wafer so that deposition of amorphous silicon (“a-Si”) on the wafer produces good formations of Hemispherical Grained Silicon (“HSG”). [0003] HSG formations enhance th...

AI Technical Summary

Benefits of technology

[0017] Passivating the surface of the wafer to inhibit reformation of native oxide and increase staging time for the wafer.

Problems solved by technology

As described in the aforementioned patents, the formation of a native oxide on a wafer's surface during wafer transfer steps causes significant problems in forming HSG structures on a wafer.

If the oxide layer is not removed or inadequately removed, it can impede the seeding step of the seeding / annealing process in HSG formation.

A persisting problem in HSG formation process is that existing process steps do not adequately etch the undesired oxide materials from the wafer.

Poor, irregularly shaped HSG formations result if the HSG process is not conducted on clean, properly prepped wafers.

There are further problems as well.

Existing techniques do not adequately passivate the wafer surface after etching.

Another etch-related problem is that conventional etching techniques do not have acceptable selectivity ratios for the different materials present during HSG formation.

Conventional cleaning and etching techniques may also leave the wafer's surface in poor condition for HSG seeding and annealing steps.

However, at room temperature, at high concentrations, HF etches oxide too fast (about 300 Å / second).

Unfortunately, these etchants suffer from the problems mentioned above: they may not etch polysilicon, or they under-etch or over-etch features on the wafer, or they do not condition a wafer well for seeding and annealing of HSG.

However, these solutions do not etch the underlying polysilicon layer to any appreciable degree, at least not without over-etching oxide layers or rendering the polysilicon surface in an unsuitable condition for HSG formation.

Still other etchants are problematic to use.

For example, HF vapor etchants are not only highly aggressive (especially on BPSG) and difficult to control, but they also require more complicated application and containment equipment than required for etchant in solutions.

HF vapor systems may also pose hazards to workers.

Another disadvantage of conventional etchants and methods is that they may not passivate the surface of the wafer adequately.

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