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Methods of forming hemisperical grained silicon on a template on a semiconductor work object

a technology of hemisperical grained silicon and work object, which is applied in the direction of crystal growth process, polycrystalline material growth, chemically reactive gas growth, etc., can solve the problem that existing process steps do not adequately etch the undesired oxide materials from the wafer, and the seeding step of the seeding/annealing process is impeded in the formation of hsg structures, so as to increase the staging time of the wafer

Inactive Publication Date: 2005-03-10
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides methods for preparing a surface of a semiconductor work object for formation of HSG structures without disrupting the integrity of the HSG template, etching native oxide from the HSG template, and passivating the surface of the work object. These methods involve cleaning the surface of the work object, treating it with a conditioning agent to prepare it for HSG formation, and directly transferring it to the HSG seeding and annealing process steps without a rinse step. The invention also provides a method for forming HSG structures on a wafer by treating the cleaned wafer with a conditioning agent to remove a predetermined amount of polysilicon from the HSG template, and transferring it to the HSG seeding and annealing process steps. The conditioning agents used in the invention have an etch selectivity ratio for BPSG to silicon dioxide of about 1 to about 2. The methods of the invention allow for good HSG formation and improve the efficiency of the semiconductor manufacturing process.

Problems solved by technology

As described in the aforementioned patents, the formation of a native oxide on a wafer's surface during wafer transfer steps causes significant problems in forming HSG structures on a wafer.
If the oxide layer is not removed or inadequately removed, it can impede the seeding step of the seeding / annealing process in HSG formation.
A persisting problem in HSG formation process is that existing process steps do not adequately etch the undesired oxide materials from the wafer.
Poor, irregularly shaped HSG formations result if the HSG process is not conducted on clean, properly prepped wafers.
There are further problems as well.
Existing techniques do not adequately passivate the wafer surface after etching.
Another etch-related problem is that conventional etching techniques do not have acceptable selectivity ratios for the different materials present during HSG formation.
Conventional cleaning and etching techniques may also leave the wafer's surface in poor condition for HSG seeding and annealing steps.
However, at room temperature, at high concentrations, HF etches oxide too fast (about 300 Å / second).
Unfortunately, these etchants suffer from the problems mentioned above: they may not etch polysilicon, or they under-etch or over-etch features on the wafer, or they do not condition a wafer well for seeding and annealing of HSG.
However, these solutions do not etch the underlying polysilicon layer to any appreciable degree, at least not without over-etching oxide layers or rendering the polysilicon surface in an unsuitable condition for HSG formation.
Still other etchants are problematic to use.
For example, HF vapor etchants are not only highly aggressive (especially on BPSG) and difficult to control, but they also require more complicated application and containment equipment than required for etchant in solutions.
HF vapor systems may also pose hazards to workers.
Another disadvantage of conventional etchants and methods is that they may not passivate the surface of the wafer adequately.

Method used

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  • Methods of forming hemisperical grained silicon on a template on a semiconductor work object
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  • Methods of forming hemisperical grained silicon on a template on a semiconductor work object

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Embodiment Construction

[0038] The present invention provides a novel method for treating a semiconductor work object so that it is suitable for use in HSG process steps. As used herein, “work object” means wafers (production, dummy, or pmon), die and packaged parts, incorporating, in whole or part, silicon substrates, and other known or discovered semiconductor materials, components, and assemblies, including, for example, silicon-on-insulator (SOI), silicon-on-sapphire (SOS), thin film transistor (TFT) materials, or germanium, periodic group III-IV materials, II-VI materials, hetero-materials (II, III, V, VI), and conductive glasses.

[0039] It will be apparent to persons of skill in the art that the present invention is not necessarily limited to any particular kind of work object. However, to illustrate the principles of the present invention, the following discussion, unless otherwise noted, will be in terms of a silicon-based wafer as the work object.

[0040]FIG. 1 is a flow chart of steps 10-16 that d...

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Abstract

The present invention provides a method of preparing a surface of a silicon wafer for formation of HSG structures. The method contemplates providing a wafer having at least one HSG template comprising polysilicon formed in BPSG, the HSG template being covered by silicon dioxide. The wafer is treated with a cleaning agent to clean the surface of the wafer. Next, the wafer is treated with a conditioning agent. The conditioning agent removes native oxide from the HSG template without excessively etching structural BPSG. Preferably, the conditioning agent also removes a thin layer of polysilicon on the HSG template. The wafer is then transferred to a process chamber for HSG formation.

Description

[0001] This invention claims the benefit of co-pending U.S. application Ser. No. 10 / 361,107, entitled “Method Of Forming Hemispherical Grained Silicon On A Template On A Semiconductor Work Object”, filed Feb. 7, 2003 which is a continuation of U.S. application Ser. No. 09 / 303,385, entitled Method Of Forming Hemispherical Grained Silicon On A Template On A Semiconductor Work Object”, filed May 1, 1999, the entire disclosures of which are hereby incorporated by reference as if set forth in their entireties for all purposes.BACKGROUND OF THE INVENTION [0002] The present invention relates to a method of cleaning and conditioning a semiconductor work object, such as a silicon wafer, so that subsequent process steps produce desired results. More particularly, the present invention provides a method of cleaning and etching a wafer so that deposition of amorphous silicon (“a-Si”) on the wafer produces good formations of Hemispherical Grained Silicon (“HSG”). [0003] HSG formations enhance th...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H10B12/00H01L21/02
CPCH01L28/90H01L28/84
Inventor CHEN, GUOQINGPAN, JAMES
Owner MICRON TECH INC
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