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High performance integrated vertical transistors and method of making the same

a vertical transistor, high-performance technology, applied in the direction of transistors, semiconductor devices, electrical equipment, etc., can solve the problems of significant degrading affecting the operation of the two devices, and affecting the performance of the npn devi

Inactive Publication Date: 2007-01-04
INT BUSINESS MASCH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach enables the creation of high-performance, vertically aligned transistors operating in a single direction, improving breakdown voltage and reducing fabrication complexity while maintaining NPN device performance.

Problems solved by technology

Circuit designers would certainly benefit from the inclusion of a complementary PNP device; however, in the development of a complementary PNP transistor, cost becomes a dominant factor.
It has been a continuing technological challenge to integrate vertical PNP devices into a high performance NPN process without significantly degrading the performance of the NPN device.
A problem for complementary transistors using the same layers and process fabrication steps is that the mode of operation of the two devices is different, i.e., one operates in an upward direction and the other operates in a downward direction.

Method used

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  • High performance integrated vertical transistors and method of making the same

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Embodiment Construction

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[0027] In describing the preferred embodiment of the present invention, reference will be made herein to FIGS. 1-11 of the drawings in which like numerals refer to like features of the invention.

[0028] The present invention provides a complementary bipolar transistor fabricated using a shared silicon germanium (SiGe) low temperature epitaxial (LTE) layer, wherein the epitaxially deposited raised extrinsic base layer of the NPN transistor is also used for the PNP diffused emitter layer. Both the NPN and PNP base and emitter regions are fully or partially contained in the LTE layer. The collector region of the PNP and NPN transistors may be inside the LTE layer as well, although not necessitated. An available in-situ doped arsenic base polysilicon layer is used as the vertical PNP emitter layer. The present invention utilizes advanced epitaxial techniques, such as molecular beam epitaxy (MBE) and low temperature epitaxy (LTE) by ultra high vacuum chemical vapor deposition (UHV / CVD) ...

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Abstract

A complementary bipolar transistor is fabricated using an available a portion of a silicon germanium (SiGe) low temperature epitaxial layer as the raised base region for a vertical NPN transistor, and another portion of the same SiGe LTE layer as a vertical PNP collector layer. The complementary pair of transistors is vertically aligned and operates in a single direction.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] This invention relates to semiconductor integrated circuit devices, and specifically to integrated BICMOS vertical transistors, and a method for making the same. More specifically, the invention relates to a vertical PNP transistor, and a set of complementary vertical NPN and PNP transistors in a downward mode or collector down configuration. [0003] 2. Description of Related Art [0004] Integrated circuit technologies are predominantly of the NPN type, generally without an available high-speed complementary PNP device. Circuit designers would certainly benefit from the inclusion of a complementary PNP device; however, in the development of a complementary PNP transistor, cost becomes a dominant factor. It has been a continuing technological challenge to integrate vertical PNP devices into a high performance NPN process without significantly degrading the performance of the NPN device. A problem for complementary tran...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L27/082
CPCH01L21/82285H01L27/0826H01L29/7378H01L29/66242H01L29/0821
Inventor SHERIDAN, DAVID C.GRAY, PETER B.JOHNSON, JEFFREY B.LIU, QIZHI
Owner INT BUSINESS MASCH CORP