Capacitance dielectric layer, capacitor and forming method thereof

Abstract

A capacitance dielectric layer is provided. The capacitance dielectric layer includes a first dielectric layer, a second dielectric layer and a silicon nitride stacked layer. The silicon nitride stacked layer is disposed between the first dielectric layer and the second dielectric layer. The structure of the capacitance dielectric layer permits an increase in the capacitance per unit area by decreasing the thickness of the capacitance dielectric layer and eliminates the problems of having a raised leakage current and a diminished breakdown voltage.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device and forming method thereof. More particularly, the present invention relates to a capacitance dielectric layer, a forming method thereof and a capacitor. [0003] 2. Description of the Related Art [0004] In recent years, with the rapid development of integrated circuit manufacturing industry, the miniaturization of devices and the increase in the level of integration continue unabated. As a result, the design of circuit devices is advancing toward ever-decreasing dimensions. [0005]FIG. 1 is a schematic cross-sectional view of a conventional capacitor. In general, a capacitor 100 mainly comprises a bottom electrode plate 105, a capacitance dielectric layer 110 and a top electrode plate 120. The top electrode plate 120 and the bottom electrode plate 105 are mostly fabricated using polysilicon. The capacitance dielectric layer 110 is normally a three-layered structu...

AI Technical Summary

Benefits of technology

The solution effectively minimizes leakage current and maintains breakdown voltage, enabling the reduction of capacitance dielectric layer thickness and enhancement of per-unit area capacitance, while ensuring processing reliability and yield.

Problems solved by technology

It should be noted that with the continuous reduction in device dimension, the capacitor structure inside some mixed mode devices or radio frequency (RF) devices may encounter the problem of not having enough per unit capacitance.

If the thickness of the capacitance dielectric layer is directly reduced using the same process, significant number of defects 130 such as seams or pinholes can easily form in the capacitance dielectric layer, particularly, the silicon nitride portion.

Ultimately, data may be lost and the processing reliability and yield may be affected.

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