Method of fabricating circuit board

Abstract

A method of fabricating a circuit board including at least one insulation layer and at least one wiring layer, the method including a first step of forming a wiring trench in a surface of the insulation layer, a second step of forming a conductor layer serving as the wiring layer in the wiring trench such that at least a portion of the conductor layer is embedded in the wiring trench, and a third step of cutting a surface of the conductor layer with a cutting tool to form the wiring layer.

Description

BACKGROUND OF THE INVENTION[0001]The present invention relates to a method of fabricating a circuit board, and particularly, relates to a method of fabricating a circuit board in which a wiring trench is formed in an insulation layer and a conductor layer is formed in the wiring trench.[0002]A method of fabricating a circuit board, for instance, a semi-additive process has been conventionally known. In the semi-additive process, a laminate formed by laminating an insulating film made of a resin material which contains an epoxy resin as a main component on a core substrate is pressed under heating using a vacuum compression-bonding hot press so that the insulating resin film is bonded to the core substrate while being heat-cured. Subsequently, via holes are formed in the insulating resin film by laser irradiation or the like. Then, an electroless plating layer is formed on the insulating resin film so as to cover an inner peripheral wall thereof which defines the respective via holes...

AI Technical Summary

Benefits of technology

The present invention provides a method for making a circuit board that can prevent excessive cutting or lack of cutting of a conductor layer that serves as a wiring layer. This results in an effective solution for ensuring proper functionality and reliability of the circuit board.

Problems solved by technology

Therefore, there is generated a local area of the conductor layer which is excessively polished, or there is contrarily generated is polished in an insufficient degree.

Further, even in a case where a surplus of the conductor layer is removed by another process except for CMP, for instance, wet etching, a thickness of the conductor layer formed by plating also tends to become non-uniform to thereby cause the same problems as described above.

In a case where a local area of the conductor layer is excessively polished, a thickness of the wiring formed in the local area becomes smaller so that there will occur a problem that specified current cannot be flowed in the wiring.

On the other hand, in a case where a region of the conductor layer is polished in an insufficient degree, there will occur a problem that a short circuit is caused between adjacent portions of the wiring in the region of the conductor layer due to lack of polishing.

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