Thyristor Volatile Random Access Memory and Methods of Manufacture

Abstract

A volatile memory array using vertical thyristors is disclosed together with methods of fabricating the array.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This patent application is related to U.S. patent application Ser. No. ______, filed of even date and entitled, “Methods of Reading and Writing Data in a Thyristor Random Access Memory,” U.S. patent application Ser. No. ______, filed of even date and entitled, “Methods of Retaining and Refreshing Data in a Thyristor Random Access Memory,” U.S. patent application Ser. No. ______, filed of even date and entitled, “Power Reduction in Thyristor Random Access;” all of which claim priority from U.S. Provisional Patent Application No. 62 / 186,336, filed Jun. 29, 2015 and entitled, “High-Density Volatile RAMs, Method of Operation and Manufacture Thereof,” and is a continuation-in part of U.S. application Ser. No. 14 / 590,834, filed Jan. 6, 2015 and entitled, “Cross-Coupled Thyristor SRAM Circuits and Methods of Operation,” which claims priority from U.S. Provisional Patent Application No. 62 / 055,582, filed Sep. 25, 3014; all of which are incorporat...

AI Technical Summary

Benefits of technology

[0015]Because the on thyristors dissipate power, power consumption in the array can be controlled by using parity bits to more closely balance numbers of on and off thyristor memory cells. For example two parity bits can define four states for a stored word that represent not

Problems solved by technology

All of the non-selected lines have potentials applied to them insufficient to change the state of any other thyristors.

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