Reference signal generator
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first embodiment
[0038]Next, embodiments of this disclosure are described with reference to the drawings. FIG. 1 is a block diagram illustrating a reference frequency generator 10 according to this disclosure. FIG. 2 is a block diagram illustrating a configuration of a delta-sigma modulator 15.
[0039]The reference frequency generator (reference signal generator) 10 of the first embodiment of this disclosure may be used in a base station of mobile phones, a transmitting station of terrestrial digital broadcasting, and a WiMAX (Worldwide Interoperability for Microwave Access) communication facility, and may provide a reference frequency signal and a reference timing pulse to a user-side device connected thereto.
[0040]As illustrated in FIG. 1, the reference frequency generator 10 of the first embodiment may include a voltage controlled oscillator (oscillator) 17, a frequency divider 18, a phase comparator 12, a loop filter (phase difference signal converter) 13, a switch circuit 14, the delta-sigma modu...
second embodiment
[0085]The reference frequency generator 10x of the second embodiment is intended to solve the above problem. For example, in the phase synchronization circuit 25 of the reference frequency generator 10x, a low-pass filter (filter) 19 may be disposed in a stage subsequent to the D / A converter 16 and precedent to the voltage controlled oscillator 17.
[0086]With the configuration of this embodiment, (similarly to the first embodiment described above,) in the phase synchronization circuit 25 which is a digital PLL circuit, the delta-sigma modulator 15 may modulate the control voltage signal outputted from the loop filter 13. In this embodiment, oversampling may be performed by the delta-sigma modulator 15.
[0087]Generally, when oversampling is performed by a delta-sigma modulator, a transfer function with respect to the quantization error is known to be small within a low frequency range, and large within a high frequency range. Therefore, quantization noise components of the output signa...
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