Circuit structure and method of manufacturing the same

Abstract

Provided is a circuit structure including a substrate, a pad, a dielectric layer, a conductive layer, an adhesion layer, and a conductive bump. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The conductive layer contacts the pad and extends from the pad to cover a top surface of the dielectric layer. The adhesion layer is disposed between the dielectric layer and the conductive layer. The conductive bump extends in an upward manner from a top surface of the conductive layer. The conductive bump and the conductive layer are integrally formed. A method of manufacturing the circuit structure is also provided.

Description

BACKGROUNDTechnical Field[0001]The disclosure relates to a semiconductor structure and a method of manufacturing the same, and more particularly to a circuit structure and a method of manufacturing the same.Description of Related Art[0002]Recently, the continuous increase in the integration of various electronic components (e.g., transistors, diodes, resistors, capacitors, and so on) leads to the rapid growth of the semiconductor industry. The increase in the integration mostly results from the continuous reduction of the minimum feature size, so that more components can be integrated into a given area.[0003]Compared to the convention package structure, these electronic components with smaller size occupy smaller area and thus require a smaller package structure. For instance, a semiconductor chip or die has an increasing number of input / output (I / O) solder pads, and a redistribution layer (RDL) can redistribute the original I / O solder pads of the semiconductor chip or die to be loc...

AI Technical Summary

Benefits of technology

The patent text describes a method of manufacturing a circuit structure using 3D printing technology. The method integrates the conductive layer and bump, preventing adhesion and inter-material compatibility issues. This improves the structural strength of the circuit and enhances product reliability. The method is simple and cost-effective, making it commercially viable.

Problems solved by technology

In addition to the cumbersome steps, the yield loss, material waste, and diversification of the manufacturing machine in the plural manufacturing processes lead to the increase in the manufacturing costs.

Besides, the adhesion issue may occur in layers of the multi-layer structure, and intermetallic compounds (IMCs) are likely to be generated among different metal materials.

Hence, the interface between the conventional RDL structure and the copper pillar bump often suffers from peeling and being crack during the reliability test.

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