Integrated high-voltage P-type LDMOS transistor structure and production thereof
A transistor and high-voltage technology, applied in the field of structural design and preparation of high-voltage P-type LDMOS transistors, to achieve the effects of increasing breakdown voltage, increasing radius of curvature, and reducing concentration gradient
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[0021] The present invention is described in further detail below in conjunction with accompanying drawing:
[0022] Referring to Fig. 1, the structure of the present invention includes a P-type substrate 1, an N-type epitaxy 3, a buried layer 2 is provided between the P-type substrate and the N-type epitaxy, and a drain region and a source region are arranged on the N-type epitaxy 3 , the drain region is provided with a low-concentration P-type region 5 on the N epitaxy, the inside of the low-concentration P-type region 5 is provided with a heavily doped P-type layer 7D, and both sides are provided with a P-type drift region 4D of the drain region; the source A heavily doped N-type region 6 is arranged in the middle of the region, and a heavily doped P-type region 7S is arranged on both sides, and a P-type drift region 4S of a source region is arranged on both sides of the heavily doped P-type region; A field oxide layer 9 is arranged between the drain regions as a thick gate...
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