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Polycrystalline silicon self-aligning plug manufacture method

A manufacturing method and self-alignment technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of inability to achieve flatness, high cost, limited improvement, and reduce particle defects and reduce costs. , to achieve convenient effect

Inactive Publication Date: 2009-03-11
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, to improve the irregularities on the surface of the wafer when grinding different abrasive materials by adjusting the grinding liquid, the cost is high, and it cannot be completely flat, and the degree of improvement is limited.
In addition, its application has certain limitations and can only be applied to the grinding of these two materials

Method used

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  • Polycrystalline silicon self-aligning plug manufacture method
  • Polycrystalline silicon self-aligning plug manufacture method
  • Polycrystalline silicon self-aligning plug manufacture method

Examples

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Embodiment Construction

[0024] In order to make the above objectives, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0025] The processing method of the present invention can be widely used in many applications, and can be made of many suitable materials. The following is a preferred embodiment to illustrate, of course, the present invention is not limited to this specific embodiment. The general substitutions well-known to those skilled in the art are undoubtedly covered within the protection scope of the present invention.

[0026] Secondly, the present invention is described in detail using schematic diagrams. In detailing the embodiments of the present invention, for ease of description, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale and should not be used as a limitati...

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Abstract

The invention discloses a method of manufacturing a polysilicon self-aligned watt plug applying to the field of semiconductor manufacture, which includes the following steps: a substrate is provided, which includes at least a grid structure and an interlayer dielectric layer having a contact opening; a polysilicon layer is deposited on the substrate; by using a chemical mechanical grinding method, the polysilicon layer is grinded on the surface of the interlayer dielectric layer; by using an etching method, the grinded polysilicon layer is etched on the top of the grid structure. By adopting the method for manufacturing the polysilicon self-aligned watt plug, a particle defect caused by a depression existing after grinding the interlayer dielectric layer can be effectively reduced and product yield can be improved.

Description

Technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a polysilicon self-aligned plug. Background technique [0002] With the rapid development of Ultra Large Scale Integration (ULSI), the feature size of components (Feature Size) continues to decrease, and the density continues to increase. The integrated circuit manufacturing process becomes more and more complex and fine. Step process, especially photolithography process, puts forward higher requirements. In this case, the self-alignment technology has received widespread attention because it can reduce the requirements for lithography accuracy, thereby reducing the area required to form the transistor. For example, in semiconductor manufacturing, a self-aligned contact (SAC) technology is often used to form polysilicon self-aligned plugs. [0003] The so-called plug is made to realize the electrical connection between the multilayer circ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
Inventor 周维
Owner SEMICON MFG INT (SHANGHAI) CORP
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