Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

PLL frequency synthesizer

A frequency synthesizer and frequency divider technology, applied in the direction of automatic power control, electrical components, etc., can solve the problems of increasing product size, circuit area, and price of PLL frequency synthesizers, and achieve high performance and simplicity. The effect of structure, low price

Inactive Publication Date: 2009-07-08
PANASONIC CORP
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0016] However, the above-mentioned conventional technology has the following problems: since the A / D converter, DSP, and D / A converter are required, the price is increased, the circuit area is greatly increased, and the circuit of the entire PLL frequency synthesizer cannot be avoided. The increase in the area results in an increase in the size and cost of the product where the PLL frequency synthesizer is installed

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • PLL frequency synthesizer
  • PLL frequency synthesizer
  • PLL frequency synthesizer

Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0048] figure 1 It is a diagram showing the configuration of the PLL frequency synthesizer according to the first embodiment of the present invention.

[0049] In the figure, the PLL frequency synthesizer has a voltage-controlled oscillator VCO, a programmable frequency divider DIV, a phase comparator PFD, a charge pump circuit CP, and a loop filter LF.

[0050] The voltage-controlled oscillator VCO mentioned above controls the signal V according to the oscillation frequency T The voltage changes the oscillation frequency. The above frequency divider DIV compares the oscillation frequency f from the voltage controlled oscillator VCO with the frequency division ratio corresponding to the channel selection signal input from the outside. OUT Carry out frequency division. The above-mentioned phase comparator PFD detects the output signal f from the above-mentioned division frequency DIV DIV with an externally input reference signal f REF The phase difference between them out...

no. 2 Embodiment approach

[0058] Next, a second embodiment of the present invention will be described. This embodiment is a modification of the linearization circuit 6 shown in the above-mentioned first embodiment.

[0059] which is, Figure 5 In the shown linearization circuit 6', two series circuits of P-type and N-type transistors MP1A and MN1A and other series circuits of P-type and N-type transistors MP1B and MN1B are arranged in the V-I conversion circuit 7'. circuit, the oscillating frequency signal V from the loop filter LF above T They are respectively input to the gates of the two N-type transistors MN1A and MN1B mentioned above. Therefore, with image 3 The shown V-I conversion circuit 7 similarly flows through the current I of the two N-type transistors MN1A and MN1B of each series circuit respectively. 1A , I 1B , according to the oscillation frequency signal V received by the gate of the respective transistor T potential changes. Moreover, in the CP bias control circuit 8', there a...

no. 3 Embodiment approach

[0063] Next, a third embodiment of the present invention will be described. This embodiment is a modification of the linearization circuit 6 shown in the above-mentioned first embodiment.

[0064] which is, Figure 7 The shown linearization circuit 6", in the V-I conversion circuit 7", receives the oscillation frequency control signal V at the gate T An N-type transistor MN3 is disposed between the source of the N-type transistor MN1 and the ground. An operational amplifier 12 is connected to the gate of the N-type transistor MN3 , and the source voltage of the N-type transistor MN1 and a bias voltage generated by the bias voltage generating circuit 11 are input to the operational amplifier 12 . The operational amplifier 12 controls the N-type transistor MN3 such that the source voltage of the N-type transistor MN1 matches the bias voltage generated by the bias voltage generating circuit 11 . in addition, Figure 7 shown in the CP bias control circuit 8, with figure 1 Th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a PLL frequency synthesizer. In the PLL frequency synthesizer, a linearization circuit (6) inputting an oscillation frequency control signal (VT) from a loop filter (LF) is provided. The linearization circuit (6) outputs a charge pump current control signal CPCONT having a larger value as the potential level of the oscillation frequency control signal (VT) becomes higher according to the potential level of the oscillation frequency control signal (VT). The charge pump (CP) receives the above-mentioned charge pump current control signal (CPCONT), and causes the current corresponding to the value to flow in or out. Therefore, the loop gain characteristic of the PLL frequency synthesizer can be adjusted to be constant with a simple circuit configuration. Therefore, even if the variable capacitance element mounted on the voltage-controlled oscillator has nonlinearity with respect to the potential of the input oscillation frequency control signal, the loop gain characteristic of the PLL frequency synthesizer having the voltage-controlled oscillator can be adjusted to constant.

Description

technical field [0001] The present invention relates to a PLL frequency synthesizer used in a semiconductor integrated circuit in the wireless communication field for transmitting / receiving local signals required for radio waves, and more particularly to improvement of the characteristics of the PLL frequency synthesizer. Background technique [0002] The structure of the conventional PLL frequency synthesizer is expressed as Figure 11 . [0003] Figure 11 The conventional PLL frequency synthesizer shown has a voltage-controlled oscillator VCO, a programmable frequency divider DIV, a phase comparator PFD, a charge pump circuit CP, and a loop filter LF. [0004] The voltage-controlled oscillator VCO mentioned above controls the signal V according to the oscillation frequency T (described later) changes the oscillation frequency. The frequency divider DIV divides the oscillation frequency from the voltage controlled oscillator VCO by a frequency division ratio correspondin...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H03L7/093
CPCH03L7/093H03L7/0898H03L7/18
Inventor 泽田昭弘
Owner PANASONIC CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com