Manufacturing method and structure of metal interconnector

Abstract

The invention relates to an inter-wire technology in metal and its structure, which provides a substrate with the first conductor. Firstly, it forms the first dielectric layer and the first pattern hard mask on the substrate. Then it etches the first hard mask to form the first shedding and the second conductor, and forms the second dielectric layer and the second hard mask on the firs hard mask. Finally, it takes the second hard mask as the etching mask and takes the first hard mask as the etching stop layer to form the second shedding and the third conductor.

Description

technical field [0001] The invention relates to a metal interconnection process and structure, in particular to a metal interconnection process and structure using a hard mask as an etching mask and an etching stop layer. Background technique [0002] As the line width of integrated circuits continues to shrink, the miniaturization of semiconductor elements has entered the nanometer level, and the integration of a single chip, that is, the greater the density of semiconductor elements on it, means the smaller the spacing between elements. This makes the manufacture of contact holes and metal interconnections more and more difficult. [0003] Please refer to Figure 1 to Figure 11. 1 to 11 are schematic diagrams of methods for manufacturing contact holes and metal interconnections in the prior art. As shown in FIG. 1, a semiconductor substrate 10 is first provided, and at least one metal-oxide-semiconductor (MOS) transistor element 20 is formed on the semiconductor substrate...

AI Technical Summary

Problems solved by technology

However, a photoresist layer that is too thin will cause problems such as insufficient shielding and boundary defects in the etching process, so the etching process cannot only use the photoresist layer pattern as an etching mask, but must use a hard mask craft

However, the 45nm process cannot use the commonly used polysilicon hard mask, because it will cause phase changes in metal silicides such as nickel silicide on the surface of the device.

[0008] In addition, the above-mentioned prior art still has a disadvantage when making metal interconnections, that is, it is necessary to deposit an etch stop layer before forming trenches. If the hard mask process proposed by the present invention is used, the process of depositing an etch stop layer can be omitted. one step

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