High-performance time-digital converter circuit structure

Abstract

The invention discloses a high performance time digital converter circuit frame, it includes time-delay chain loop which generates low bit data, counter which generates high bit data and a compensating control source; said time-delay chain loop counts the low bit and transfers to said counter in definite period, said counter accumulates the signal with definite period to be the high bit of the time digital converter; Said compensating control source compensates and controls the voltage signal of said time-delay chain loop; The precision is high; the minimum time distinguishing ratio is the one class buffer transmission delay; the speed of processing is quick, when the counting ends, data is obtained, without additional processing time; the output of flip-latch is connected with high bit counter, it guarantees the correctness of circulation and carry; the compensating control source is introduced to guarantee the consistency of system under the same temperature, voltage, craft; the requirement for every module is not high, so it is easy to realize.

Description

technical field [0001] The invention relates to a circuit architecture, in particular to a high-performance time-to-digital converter circuit architecture for converting time intervals into digital signals. Background technique [0002] The so-called TDC (Time-to-Digital Converters) is a time-to-digital converter, which is a timer that converts time intervals into digital signals. [0003] The most basic time-to-digital converter is to use a counter to count a series of digital pulses within the time range to be measured; although the existing oscillator counting can achieve stable high-speed pulses, the accompanying power consumption and noise is unacceptable. The really effective method is to use a lower timing frequency for large time measurement, and do special processing for the part of the time that is less than one cycle of this timing time to achieve accurate measurement. [0004] For this precise measurement that requires special handling, several common timing me...

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Problems solved by technology

[0005] Capacitor voltage method: within the range of the part to be tested, use a current to charge the capacitor, and then discharge it after it is fully charged. The analog-to-digital converter ADC converts the voltage into a digital quantity, which can realize accurate measurement in less than one cycle; the disadvantage of this method is that a high-precision analog-to-digital converter ADC is required, and this analog-to-digital converter ADC The design itself requires a series of complex considerations; ensuring the linearity of the capacitor voltage is also a difficult point, and the charging current is also easily disturbed by external conditions

[0006] Time extension method: Similar to the above method, the difference is that at the end of the test time, a rated current much smaller than the charging current is used to discharge the capacitor until the capacitor voltage drops to the charging start voltage. During the discharge process, the counter is used to measure the multiplied time; although this scheme is greatly improved compared with the previous scheme, in order to obtain higher accuracy, the charging current is required to be many times larger than the discharging current. In order to make this ratio sufficient Large, requires a small discharge current and a large charge current

A discharge current that is too small is easily disturbed, and a charge current that is too large is not realistic.

After the timing period is over, a dedicated processing time is required to slowly discharge the capacitor, and continuous time-to-digital conversion cannot be achieved

[0007] Vernier caliper method: the basic principle is to generate three sets of pulse waveforms, one set of reference pulses, two sets of trigger pulses, the two sets of trigger pulses have the same period but slightly different from the reference pulse period, three counters respectively calculate the number of three sets of pulses; the initial pulse After the start, the start counter counts the number of start pulses, and when the start pulse overlaps with the reference pulse, it stops counting; similarly, the end counter counts the number from the start of the end pulse to when it overlaps with the reference pulse, and the reference counter starts counting The number of reference pulses between the start of the pulse and the end pulse; the resolution of this method is determined by the period difference of the two pulses. The disadvantage is that the phase detector that needs a high discrimination phase difference will not be able to detect the phase difference after the timing period ends. Additional time is required to wait for the end pulse to coincide with the reference pulse, and continuous time digital conversion cannot be achieved

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