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Motion estimation core of video system

A motion estimation and kernel technology, applied in the fields of digital video signal modification, television, electrical components, etc., can solve the problem that ME algorithm is not suitable for hardware real-time processing, etc., to achieve the effect of many search samples, fast search speed, and improved efficiency

Inactive Publication Date: 2012-05-23
CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
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AI Technical Summary

Problems solved by technology

[0005] In order to solve the problem that the prior art ME algorithm is not suitable for real-time processing with hardware (FPGA chip), the object of the present invention is to provide a motion estimation kernel device for a video system

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  • Motion estimation core of video system
  • Motion estimation core of video system
  • Motion estimation core of video system

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Embodiment Construction

[0022] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.

[0023] figure 1 It is a structural block diagram of the motion estimation kernel of the video system of the present invention; the kernel is arranged in an FPGA chip (in the dotted line box in the figure). like figure 1 As shown, it includes:

[0024] The data input controller 1 is used to read from the image frame memory the macroblocks that need to be processed by motion estimation ME in the current frame, and the search window corresponding to the macroblock in the reference frame. According to the ME search algorithm, select more than one in the search window Up to 9 macroblocks participate in the calculation of pixel absolute difference and SAD (sum of pixel absolute difference), perform block matching calculation, and determine whether the best matching block has been found according to the result of SAD calculation, so as to obtain th...

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Abstract

The invention discloses a video system motion estimation (ME) inner core equipped in FPGA, which comprises: a data input controller for reading out a macro block for ME treatment from a video frame memorizer; a reference frame buffer zone and a current frame buffer zone both for storing frame data, a line scan / residual calculation controller to search a plurality of MVs, a SAD calculation array capable of performing the simultaneous SAD calculation of 16 MVs and selecting the MV corresponding to the minimal SAD, a residual calculation unit for the calculation of 16 points in one row, completing the macro block residual calculation of one image in total 16 periods. The invention provides an on-chip data buffer zone with 'line / row structure' and constructs a parallel arithmetic array, so that the 'point type searching' is converted to the 'linear scanning' for simultaneously inputting and outputting data; the invention can provide data required for a plurality of arithmetical units and helps to increase the work efficiency.

Description

technical field [0001] The present invention relates to a video compression system, in particular to a motion estimation kernel device for a video system. Background technique [0002] All applications of video and visual communications process large amounts of data, so video compression is an integral part of modern digital video applications. The principle of video compression is to eliminate time and space redundancy between video data sequences as much as possible. The elimination of spatial redundancy is mainly realized by various intra-frame transform coding techniques, such as widely used DCT (discrete cosine transform) and DWT (discrete wavelet transform) transform. The main methods for eliminating temporal redundancy, that is, inter-frame redundant information, are based on Motion Estimation (ME) and Motion Compensation (MC). First, motion estimation is performed on the video image to obtain the motion vector, and then motion compensation is performed, and finally...

Claims

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Application Information

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IPC IPC(8): H04N7/26H04N19/176H04N19/436H04N19/51H04N19/537
Inventor 章宇东
Owner CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST