Grids production method

A manufacturing method and gate technology, which are used in semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc., to achieve the effects of improving efficiency, improving reliability, and reducing costs

Inactive Publication Date: 2008-06-11
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] Therefore, the object of the present invention is to provide a gate manufacturing method to solve the problem that the existing gate manufacturing method forms a foot-shaped profile at the bottom of the gate

Method used

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Embodiment Construction

[0036] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0037] Figure 9 It is a flow chart of the first embodiment of the gate manufacturing method of the present invention. Such as Figure 9 As shown, first, a semiconductor substrate is provided, and a conductive layer is formed on the semiconductor substrate (S200). The semiconductor base material includes a semiconductor substrate and an oxide layer. The semiconductor substrate can be one of semiconductor materials such as monocrystalline silicon, polycrystalline silicon, amorphous silicon, germanium, etc., and the thickness of the oxide layer is 5 to 5. 100nm. The conductive layer is one of polysilicon, metal silicide or a combination thereof, and the method for forming the conductive layer is physical vapor deposition or chemical v...

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Abstract

The invention relates to a manufacture method for grid, which comprises the following steps of: providing a semi-conductor substrate and forming a conductive layer on the semi-conductor substrate; revolving and coating optical carved glue layer on the conductive layer and imaging to form a grid pattern; transferring the grid pattern to the conductive layer through etching; measuring the line width of the grid and judging whether the bottom of the grid has a foot-shaped drawback, and performing directional plasma etching for the grid which has the foot-shaped drawback. The grid formed by the method has a better side wall profile.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a gate in a semiconductor device. Background technique [0002] With the advancement of semiconductor manufacturing technology, the size of its gate is getting smaller and smaller, and the small gate line width can reduce the driving voltage of the formed device, thereby reducing power consumption; at the same time, it can reduce the size of the entire device formed Therefore, the industry always forms a smaller gate size through various methods. In the Chinese patent application number 200410093459, a process for reducing the gate line width is disclosed. Figure 1 to Figure 5 A schematic cross-sectional view of a structure corresponding to the process disclosed in said patent. [0003] Such as figure 1 As shown, a semiconductor substrate 100 is first provided, a gate oxide layer 102 is formed on the semiconductor substrate 100, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/336H01L21/66
Inventor 张海洋杜珊珊刘乒马擎天
Owner SEMICON MFG INT (SHANGHAI) CORP
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