Electrifying reset and undervoltage turnoff circuit

Abstract

The invention discloses an electrifying reset and undervoltage turnoff circuit, including a partial pressure following circuit (1), a voltage comparator (2), a delay buffer circuit (3) and a reset turnoff circuit (4). The partial pressure following circuit (1) generates two outputs by two detection circuits to compare by the voltage comparator (2), an output of the voltage comparator (2) after delaying and reshaping of the delay buffer circuit (3) generates an electrifying reset signal to output, the reset turnoff circuit may input EN to decide a reset opportunity. The structure of the circuit is simple and novel, an area of a chip occupied by circuit is small, and a power consumption is low. It is capable of providing a electrifying reset and undervoltage turnoff function on a on-chip system, and the circuit is capable of operating on various technique angles and in a wider temperature range by a small current reliably.

Description

technical field [0001] The invention belongs to the technical field of the integrated circuit field, and in particular relates to a power-on reset and under-voltage shutdown circuit applicable to but not limited to cmos mixed-signal circuits. Background technique [0002] Currently, power-on reset circuits are widely used in mixed-signal and system-on-chip. When the system is powered up, the supply voltage rises from zero to the normal operating voltage. However, the normal operation of circuit devices requires a minimum power supply voltage. If the power supply has not risen to a high enough level, the circuit will work, which will easily cause erroneous actions of digital circuits or storage units, resulting in system operation errors. [0003] The power-on reset circuit sends out a power-on reset signal when the power supply voltage rises to the set value, so that the circuit starts to work. When the power supply drops to the set value, the circuit is turned off to avoi...

AI Technical Summary

Problems solved by technology

[0004] Chinese patent application number CN200510072676.2 discloses a device and method for providing a power-on reset signal, the schematic diagram of which is as follows figure 1 As shown, two resistors in series are used to divide the voltage to detect the power supply voltage, so the voltage division part will consume a large current and the resistance area will be large

At the same time, the MOS tube also has a sub-threshold conduction phenomenon. Even if the gate voltage does not reach the threshold voltage, there will be current flowing, so that the reset signal generated by the circuit becomes difficult to control when the power supply rises.

In addition, the threshold voltage of the MOS tube will vary greatly with the process angle and temperature, so the adaptability of the circuit to the process angle and temperature is very poor.

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