SATA controller based on FPGA

A controller and cyclic redundancy check technology, applied in the field of controllers, can solve problems such as low flexibility, poor versatility, and difficult upgrades, and achieve the effect of reducing PCB area and improving reliability

Inactive Publication Date: 2009-12-09
INST OF OPTICS & ELECTRONICS - CHINESE ACAD OF SCI
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AI Technical Summary

Problems solved by technology

[0012] In order to overcome the disadvantages of poor versatility, low flexibility, and difficult upgrades of SATA control devices based on ASICs, and at the same time in order to reduce power consumption, reduce PCB (Printed Circuit Board) area, and realize equipment miniaturization, the present invention provides an FPGA-based SATA controller

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  • SATA controller based on FPGA
  • SATA controller based on FPGA
  • SATA controller based on FPGA

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Embodiment Construction

[0084] In the present invention, the application layer of the SATA protocol is implemented by the embedded processor PPC4402, which mainly completes the hard disk parameter configuration and read and write operation commands. The transport layer and the link layer of the SATA protocol are completed by the SATA_CONTROL module 121, which is realized by producing corresponding circuits in the FPGA through hardware description language design, see Figure 3-5 . This module completes frame encapsulation, frame sending, pause, end control, frame analysis and verification. The physical layer of the SATA protocol is implemented by a gigabit transceiver 127 , an out-of-band signal control module 122 and an interface transmission rate selection module 123 . The main functions of the gigabit transceiver 127 include 8B / 10B encoding / decoding, serial-to-parallel / parallel-to-serial conversion, comma detection, clock correction, pre-emphasis and linear equalization, etc. The out-of-band sig...

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Abstract

A SATA controller based on FPGA comprises a cyclic redundancy check module for executing cyclic redundancy check calculation on data, a scrambling / descrambling code module for executing scrambling / descrambling code calculation on data, a frame generating module for finishing the packaging of frame, a frame sending module for controlling the sending, pausing and ending of frame, a frame receiving module for finishing the analysis of frame, a register group for storing the control and state information of the controller, a subscriber interface module for realizing the information and data switching between a processor and the controller, and between a memory and the controller through PLB and NPI interfaces, an out-of-band-signal control module for controlling the electricity and hardware resetting process on a rigid disk and founding the communication link between the controller and the rigid disk, an interface transfer rate select module for automatically selecting the interface transfer rate of the rigid disk, a reset module for generating the reset signal of each submodule, a gigabit-grade transceiver mainly for finishing 8B / 10B coder and decoder, deserializing,clock amending and the like and an LED indication modular for indicating the working condition of the rigid disk.

Description

technical field [0001] The invention relates to the realization of a controller satisfying the Serial Advanced Technology Attachment (SATA), adopts a large-scale Field Programmable Gate Array (Field Programable Gate Array, FPGA) as a realization platform, realizes the SATA interface standard, manages And control the incoming and outgoing data of SATA interface devices. Background technique [0002] In a computer system, a storage device is connected to a computer through various interfaces, among which an Advanced Technology Attachment (ATA) interface is one of the most common interfaces. ATA mainly refers to the connection specification between hard disk drives and computers, which enables users to easily connect hard disks and other storage devices to PCs. It used to be our most commonly used hard disk interface specification. The ATA standard has experienced seven generations of standards since 1994. In 2002, the latest ATA-7 standard has a maximum data transmission spee...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06
Inventor 苏海冰吴威吴钦章郭帅
Owner INST OF OPTICS & ELECTRONICS - CHINESE ACAD OF SCI
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