Phase frequency detector and charge pump circuits applying to integral frequency division phase-locked loop

A phase-locked loop and integer frequency division technology, which is applied to electrical components, electric pulse generation, automatic power control, etc., can solve the problems of complex differential CP design and large power consumption, and achieve the effect of solving non-ideal effects

Inactive Publication Date: 2012-05-30
FUDAN UNIV
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Problems solved by technology

However, the disadvantages of differential CP are also obvious: since currents always appear in pairs, large power consumption is unavoidable; common-mode feedback is required to control the common-mode level of the output voltage; differential CP design is relatively complicated

Method used

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  • Phase frequency detector and charge pump circuits applying to integral frequency division phase-locked loop
  • Phase frequency detector and charge pump circuits applying to integral frequency division phase-locked loop
  • Phase frequency detector and charge pump circuits applying to integral frequency division phase-locked loop

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Embodiment Construction

[0029] The PFD and CP circuits are applied in the integer frequency division phase-locked loop, and adopt the TSMC 0.13um RF CMOS 1P8M process. The power supply voltage is 1.2V, and the CP circuit current is 400uA. The concrete realization method of PFD and CP circuit is as follows.

[0030] In the frequency synthesizer, since the frequency of the input reference clock is relatively low (48MHz), the structure of a three-state phase detector can be adopted and realized with standard CMOS logic gates. Take the switch controlled by UPB signal as an example (the specific structure is as follows figure 1 As shown), the width-to-length ratio of the M11 tube is 1 / 2 of that of the M9 tube. It has two main functions, one is to reduce the influence of the clock feedthrough effect, and the other is to reduce the injection effect of the channel charge. This requires the clock signals UP, UPB, DN, DNB to be figure 2 shows the symmetrical inverting characteristics, so the design of the...

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Abstract

The invention belongs to the technical field of integrated circuit, in particular to PFD (phase frequency device) and CP (charge pump) circuits applying to an integral frequency division phase-locked loop. The PFD circuit adopts four Latches, so that output signals UP and UPB, and DN and DNB have very good symmetry to reduce the clock feedthrough effect and charge injection effect of the CP circuit; two PMOS tubes with small size are adopted to realize level recovery function, solve the problems that the UP, UPB, DN and DNB signals are in an uncertainty state when the circuit is electrified, and prevent the work error of the CP circuit; the CP circuit adopts two rail-to-rail constant transconductance operational amplifiers so as to solve the problems of current mismatch and charge sharing, adopts four dummy tubes so as to solve the problem of charge injection, and adopts two resistances with small size so as to effectively reduce the charge and discharge current spikes.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a PFD (phase frequency detector) and CP (charge pump) circuit applied in an integer frequency division phase-locked loop. Background technique [0002] The integer frequency-division phase-locked loop is composed of a frequency-discrimination phase detector, a charge pump, a loop filter, a voltage-controlled oscillator and a divider. Among them, the frequency and phase detector compares the frequency and phase difference between the signal of the crystal oscillator and the signal of the voltage-controlled oscillator after the frequency divider, and converts the difference into a current through the charge pump. The charge and discharge of the loop filter is converted into a voltage signal to control the frequency of the voltage-controlled oscillator, thus forming a negative feedback loop and precisely locking the output frequency of the oscillator to a cer...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K3/00H03L7/08
Inventor 任俊彦蔡德鋆傅海鹏陈丹凤李巍李宁许俊叶凡
Owner FUDAN UNIV
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