OTP (One Time Programming) device and manufacture method

Abstract

The invention discloses a manufacture method of an OTP (One Time Programming) device, which comprises the following steps of: 1, forming a well region and a field region which are effectively isolated on a substrate; 2, forming a gate oxide layer above an active area, forming polysilicon on the gate oxide layer and etching to form a transistor polysilicon floating gate; 3, carrying out light dope leakage implantation on the active area firstly; 4, carrying out low-energy high-dosage implantation on the active area in a transistor part; and 5, forming a polysilicon side wall on the side face of the polysilicon gate, and then forming an active area of a NMOS (N-channel Metal Oxide Semiconductor) / PMOS (P-channel Metal Oxide Semiconductor) transistor by using an ion implantation technology. The invention also discloses an OTP device, and a P+ active area and a N+ active area of a coupling capacitor part are arranged below the polysilicon floating gate. The invention can improve the programming efficiency and effectively reduce a storage area.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuits, in particular to an OTP device and a preparation method of the OTP device. Background technique [0002] OTP (One Time Programming, one-time programmable) device is a storage device. Compared with multiple programming, its programming process is an irreversible activity. It is suitable for applications where the program is fixed because the cost is relatively low. low and widely used. [0003] Such as Figure 1a As shown, the existing OTP device generally consists of a coupling capacitor NMOS capacitor plus an NMOS transistor. Such as Figure 1b As shown, the layout of the OTP device in the prior art includes polysilicon, N+ active regions, and contacts. Usually the OTP device implements the basic programming and charge storage functions of the OTP through a transistor and a floating gate capacitor. [0004] The working principle of the existing OTP device is to use FN tunneli...

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Problems solved by technology

This depletion layer capacitance is much smaller than the gate oxide capacitance, and it is connected in series with the gate oxide capacitance during programming, which greatly affects the voltage coupling efficiency of the coupling capacitor.

Therefore, in order to ensure programming efficiency, the area of ​​the capacitive coupling part of the common OTP structure will be large, wasting the area of ​​the memory cell; and usually require a higher programming pulse voltage to reduce the voltage loss during capacitive coupling. It is bound to put forward higher requirements for the process

[0006] In addition, the general process will use high-energy, low-concentration LDD implantation in the transistor area to prevent CHE from affecting the reliability of the transistor. Hot electron injection (HCI, hot carrier injection), which is a limitation on the programming ability of OTP itself

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