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High-bandwidth low-power consumption frequency-compensation three-stage operational amplifier

An operational amplifier, frequency compensation technology, applied in differential amplifiers, improved amplifiers to expand bandwidth, DC-coupled DC amplifiers, etc., can solve problems affecting amplifier stability, obstacles, etc., to improve phase margin, increase slew rate , to improve the effect of compensation

Inactive Publication Date: 2010-12-15
FUDAN UNIV
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  • Abstract
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Problems solved by technology

However, this structure is generally applied in the case of driving large capacitive loads and resistive loads. When the bandwidth is not high, it has a relatively large advantage. When driving a small capacitor but requires high bandwidth and low power consumption, The first Miller compensation resistor C m1 The short-circuit effect will appear at high frequencies, and the parasitic poles of the second-stage transconductance compensation structure will also affect the stability of the amplifier, hindering the realization of low power consumption and high bandwidth requirements

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Embodiment Construction

[0038] The present invention will be described in detail below in conjunction with the accompanying drawings and examples.

[0039] Figure 4 It is a structural block diagram of a three-stage frequency compensation operational amplifier of the present invention, and the three-stage amplifier includes a first-stage amplifier N1, a second-stage amplifier N2, and a third-stage amplifier N3. The transconductances of these three stages of amplifiers are g m1 , g m2 and g m3 , the output resistances are R 1 , R 2 and R 3 , the lumped output capacitance is C 1 、C 2 and C 3 , the load capacitance is C L . Transconductance stage N4 and feed-forward transconductance stage N5, their transconductances are g mt and g mf . Miller Compensation Capacitor C m1 Across the output terminal of N3 and the high-frequency zero-pole separation resistor R s between. High-frequency zero-pole separation resistor R s across the output of N1 and the Miller compensation capacitor C m1 betw...

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Abstract

The invention belongs to the technical field of analog IC (Integrated Circuit) design, in particular to a high-bandwidth low-power consumption frequency-compensation three-stage operational amplifier. The amplifier comprises an input stage, a second stage, an output stage, a common mode feedback stage, a comprehension circuit, an internal feedforward circuit, wherein the second stage is connectedwith the input stage, the output stage is connected with the second stage and used for amplifying a signal output by the second stage and driving an external load circuit, the common mode feedback stage extracts the common mode level of the differential output stage and stabilizes the common mode level, the comprehension circuit comprises a traditional trsanscondutance comprehension circuit, a miller comprehension circuit and a resistor for separating a high-frequency zero pole, and the internal feedforward circuit is used for comprehending an internal additional pole and forming a push-pull circuit together with the output stage to reduce static power consumption. The three-stage operational amplifier realizes high gain, high bandwidth and high stability under the condition of little DC power consumption and can be used in a high-speed analog-digital conversion circuit, such as a sigma-delta modulator suitable for the bandwidth of an LTE (Line Terminator Equipment) wireless communication protocol.

Description

technical field [0001] The invention relates to the technical field of analog integrated circuit design, in particular to a frequency-compensated three-stage operational amplifier with high bandwidth and low power consumption, which can be used in high-speed analog-to-digital conversion circuits. Background technique [0002] With the continuous update of semiconductor process technology, the power supply voltage under CMOS process is getting lower and lower. As the basic module of analog integrated circuit design, the design of operational amplifier has been challenged more and more. The general structure needs to use shorter channel length to achieve faster speed in order to obtain high bandwidth at lower power consumption, but it will result in lower DC gain, and shorter channel length will produce larger Due to process deviation, traditional methods of increasing gain such as stacking transistors or gain bootstrap circuits are no longer suitable for future technological ...

Claims

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Application Information

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IPC IPC(8): H03F3/45H03F1/42H03F1/02
CPCY02B60/50
Inventor 李冉刘俊娟洪志良
Owner FUDAN UNIV
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