MOS (Metal Oxide Semiconductor) transistor and manufacture method thereof

Abstract

The invention relates to an MOS (Metal Oxide Semiconductor) transistor and a manufacture method thereof, wherein the MOS transistor comprises a semiconductor substrate, a first grid through hole, a second grid through hole, grid dielectric layers, grids, source / drain extension regions and side walls, wherein the semiconductor substrate sequentially comprises an oxidization layer, a first p-type polysilicon layer, a first n-type polysilicon layer, a second p-type polysilicon layer and a second n-type polysilicon layer; the first grid through hole is positioned in the first p-type polysilicon layer; the second grid through hole is positioned in the second p-type polysilicon layer; the grid dielectric layers are positioned on the second n-type polysilicon layer and the inner walls of the first grid through hole and the second grid through hole; the grids are positioned on the gird dielectric layers and in the first grid through hole and the second grid through hole; the source / drain extension regions are positioned in source / drain regions at two sides of the grids; the side walls are positioned at two sides of the grids and the two sides of the source / drain regions; wherein the first n-type polysilicon layer and the second n-type polysilicon layer have smooth corners after processed at high temperature. The invention improves the utilization ratio of the chip area, and solves the corner effect caused by strong corner current.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a MOS transistor and a manufacturing method thereof. Background technique [0002] As the semiconductor industry develops towards smaller and faster devices, the feature lateral dimensions and depths of semiconductor devices are gradually reduced, requiring source / drain and source / drain extension regions (Source / DrainExtension) to become shallower accordingly. The process level requires that the depth of the source / drain junction of the semiconductor device is less than 1000 angstroms, and may eventually require the junction depth to be on the order of 200 angstroms or less. Currently, the source / drain junction is almost always formed by doping by ion implantation. As the size of electronic components shrinks, how to manufacture the source and drain of metal-oxide-semiconductor (MOS) transistors with nanometer process technology is the development direction of ion implant...

AI Technical Summary

Problems solved by technology

[0006] The structure of the MOS transistor formed by the existing technology is single, and the design is not flexible enough; and as the integration of semiconductor devices becomes higher and higher, the room for its volume to become smaller becomes smaller and smaller, which cannot meet the needs of process development

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