Method of dielectric film treatment

Abstract

A method and system for cleaning a surface of a substrate after an etching operation includes determining a plurality of process parameters associated with the surface of the substrate. The process parameters define characteristics related to the surface of the substrate such as characteristics of the substrate surface to be cleaned, contaminants to be removed, features formed on the substrate and chemicals used in the fabrication operations. A plurality of application chemistries are identified based on the process parameters. The plurality of application chemistries includes a first application chemistry as an emulsion having a first immiscible liquid combined with a second immiscible liquid and solid particles distributed within the first immiscible liquid. The plurality of applicationchemistries including the first application chemistry are applied to the surface of the substrate such that the combined chemistries enhance the cleaning process by substantially removing the particulate and polymer residue contaminants from the surface of the substrate while preserving the characteristics of the features and of the low-k dielectric material through which the features are formed.

Description

technical field

[0001] The present invention relates generally to semiconductor substrate processing, and more particularly to methods of cleaning substrate surfaces after etching operations. Background technique

[0002] Semiconductor devices are obtained through various manufacturing operations. These fabrication operations define features on a semiconductor wafer (wafer or substrate) that span multiple layers. At a basic level, a plurality of transistor devices with diffusion regions are defined. At subsequent levels, interconnections using metal wiring are defined and electrically connected to underlying transistor devices to form semiconductor devices such as integrated circuits (ICs), memory cells, and the like. A low-k dielectric material is used to separate and isolate these features and other layers to obtain a fully functioning semiconductor device. To provide better isolation between features and further reduce coupling capacitance and power consumption, the lo...

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