Dynamic comparator circuit of super-speed flash type analog-to-digital converter

A technology of analog-to-digital converters and dynamic comparators, which is applied in the direction of analog-to-digital converters, multiple input and output pulse circuits, etc., can solve the problems of dynamic comparator precision influence, precision limitation, power loss, etc., to reduce random Effects of offset voltage, low offset voltage, and reduced power consumption

Inactive Publication Date: 2011-04-13
FUDAN UNIV
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Problems solved by technology

[0003] Traditional flash analog-to-digital converters require an ultra-high-speed dynamic comparator circuit, which inevitably introduces noise and various errors, and the accuracy will be limited
And for ultra-high-speed input signals (above GHz), it will become very difficult to meet the speed requirements
At the same time, since the dynamic comparator will hav

Method used

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  • Dynamic comparator circuit of super-speed flash type analog-to-digital converter
  • Dynamic comparator circuit of super-speed flash type analog-to-digital converter
  • Dynamic comparator circuit of super-speed flash type analog-to-digital converter

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Embodiment Construction

[0018] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0019] Such as figure 1 As shown, the dynamic comparator of the ultra-high-speed flash analog-to-digital converter includes a double-tailed latch comparator and a dynamic offset elimination circuit. Among them, the speed of the double-tailed latch comparator is far greater than that of the traditional latch comparator. Dual-tailed latch comparators such as figure 2 As shown, M5 is the tail current source of the input stage of the double-tailed latch comparator, and M14 and M15 form the tail current source of the latch stage. Compared with the traditional latch, the structure of the double-tailed latch comparator can work at a lower power supply voltage. when =0 is the reset stage, through the transistors M3 and M4 will It is precharged to the power supply voltage, and at the same time, the output terminal is short-circuited to the ground through M8 an...

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Abstract

The invention belongs to the technical field of analog integrated circuit designs, in particular to a dynamic comparator circuit of a super-speed flash type analog-to-digital converter. The circuit comprises a double-tail latching comparator and a dynamic disorder cancellation circuit. The circuit operation is divided into the following four steps: disorder storage, input signal storage, comparison and reset. Compared with the traditional latching comparator, the double-tail latching comparator can operate under the state of super high frequency. The dynamic comparator has the advantages that the dynamic cancellation of disorder voltages is eliminated without a preposing amplifier, thus the power consumption is reduced greatly; and in addition, the overdrive voltage of an input transistor is independent of the input common-mode voltage and threshold voltage of the input transistor, so the overdrive voltage of the input transistor can be optimized to further reduce the random disorder voltage. By utilizing the dynamic comparator circuit provided by the invention, the comparison of a super speed signal can be realized with lower power consumption, and moreover, high resolution ratio can be realized.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuit design, and in particular relates to a dynamic comparator circuit of an ultra-high-speed flash analog-to-digital converter. Background technique [0002] The analog-to-digital converter is an important part of the mixed-signal system. There are many types of structures. Among them, the flash-type analog-to-digital converter is the fastest among all analog-to-digital converters. It is widely used in digital oscilloscopes, disk read and write, UWB, radar and other fields. [0003] Traditional flash analog-to-digital converters require an ultra-high-speed dynamic comparator circuit, which inevitably introduces noise and various errors, and the accuracy will be limited. And for ultra-high-speed input signals (above GHz), it will become very difficult to meet the speed requirements. At the same time, since the dynamic comparator will have a large "kickback noise", this will have a g...

Claims

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Application Information

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IPC IPC(8): H03K5/22H03M1/12
Inventor 赵裔王申杰洪志良
Owner FUDAN UNIV
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